[llvm] [LV][RISCV] Widen VF to enable dot-product partial reductions (PR #219902)

[Elvis Wang via llvm-commits]

ElvisWang123 wrote:

I think we can increase the default vectorizer lmul from `2` to `8`  in https://github.com/llvm/llvm-project/pull/222213

I tried to add `-riscv-v-register-bit-width-lmul=8 ` and seems all tests can generate partial.reduction. https://godbolt.org/z/jYd7Wbdj7

https://github.com/llvm/llvm-project/pull/219902