[llvm] [AArch64] Avoid scalar DUP for promoted narrow extracts (PR #221186)

[Oscar Priego via llvm-commits]

Opriego wrote:

Closing this after re-investigating the original issue and validating the behavior on current trunk.

The reproducer from #221122 is already fixed by #156314. I verified this independently by:

- rebuilding current `upstream/main`,
- compiling the regression case for `aarch64_be-linux-gnu`,
- linking it as a freestanding big-endian AArch64 ELF,
- executing it under `qemu-aarch64_be`.

Current `main` returns the correct result (`exit status 0`) even though the lowering still contains the scalar round-trip:

```asm
umov w9, v4.b[0]
dup  v4.4h, w9
```

The PR version also returns the correct result (`exit status 0`).

I also traced the SelectionDAG and confirmed that, in this case, the promoted high bits do not affect the defined result: the subsequent packing/reordering discards the irrelevant bits before they become observable.

So the correctness premise behind this patch does not hold for #221122, and I do not think this change should be kept on that basis.

During the investigation I found a separate, apparently unreachable `DUPLANE` path in `LowerBUILD_VECTOR()`. That finding is now tracked independently in #222138.

Thanks to Dave and Luke for the feedback and for pointing me toward the existing fix.


https://github.com/llvm/llvm-project/pull/221186