[llvm] [AMDGPU] Use AllowLDSDMA=false in non-hazard passes (part 2) (PR #222086)

[Matt Arsenault via llvm-commits]

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@@ -258,46 +258,9 @@ bool SIInstrInfo::isReMaterializableImpl(
   return true;
 }
 
-bool SIInstrInfo::isSrc1DPPRevOpcode(const GCNSubtarget &ST, uint32_t Opcode) {
-  switch (Opcode) {
-  // v_subrev_u16 (gfx9)
-  case AMDGPU::V_SUBREV_U16_e32:
-  case AMDGPU::V_SUBREV_U16_e64:
-  // v_subrev_u32 (gfx9) / v_subrev_nc_u32 (gfx10+)
-  case AMDGPU::V_SUBREV_U32_e32:
-  case AMDGPU::V_SUBREV_U32_e64:
-  // v_subrev_co_u32
-  case AMDGPU::V_SUBREV_CO_U32_e32:
-  case AMDGPU::V_SUBREV_CO_U32_e64:
-  // v_subbrev_u32 (gfx9) / v_subrev_co_ci_u32 (gfx10+)
-  case AMDGPU::V_SUBBREV_U32_e32:
-  case AMDGPU::V_SUBBREV_U32_e64:
-    return true;
-  // REV shift opcodes worked this way before GFX11, verified on hardware
-  case AMDGPU::V_ASHRREV_I16_e32:
-  case AMDGPU::V_ASHRREV_I16_e64:
-  case AMDGPU::V_ASHRREV_I32_e32:
-  case AMDGPU::V_ASHRREV_I32_e64:
-  case AMDGPU::V_ASHRREV_I64_e64:
-  case AMDGPU::V_LSHLREV_B16_e32:
-  case AMDGPU::V_LSHLREV_B16_e64:
-  case AMDGPU::V_LSHLREV_B32_e32:
-  case AMDGPU::V_LSHLREV_B32_e64:
-  case AMDGPU::V_LSHLREV_B64_e64:
-  case AMDGPU::V_LSHRREV_B16_e32:
-  case AMDGPU::V_LSHRREV_B16_e64:
-  case AMDGPU::V_LSHRREV_B32_e32:
-  case AMDGPU::V_LSHRREV_B32_e64:
-  case AMDGPU::V_LSHRREV_B64_e64:
-    return !ST.hasGFX11Insts();
-  default:
-    return false;
-  }
-}
-
 // Returns true if the result of a VALU instruction depends on exec.
 bool SIInstrInfo::resultDependsOnExec(const MachineInstr &MI) const {
-  assert(isVALU(MI, /*AllowLDSDMA=*/true));
+  assert(isVALU(MI, /*AllowLDSDMA=*/false));
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arsenm wrote:

Why? 

https://github.com/llvm/llvm-project/pull/222086