[llvm] [X86][CostModel] Cost gathers by the instructions CodeGen emits (PR #220565)
Sumukh J Bharadwaj via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 8 06:27:05 PDT 2026
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@@ -0,0 +1,70 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
+; Gathers and scatters over pointers that are not in address space 0. On x86,
+; address spaces 270 and 271 hold 32-bit pointers, so a vector of them is half
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amd-subharad wrote:
Added the cases rather than narrowing the comment, since you are right that 271 moves under the same configurations as 270. I also added an address-space 272 control
One limitation: these are cost-only, with no paired `llc` check, because `llc` crashes on address spaces 270 and 271 with "Cannot emit physreg copy instruction" in Post-RA expansion
https://github.com/llvm/llvm-project/pull/220565
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