[llvm] [BOLT][AArch64] Fix relocation type for `LDRSW` (PR #221939)

Shanzhi Chen via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 8 02:37:22 PDT 2026


https://github.com/chenshanzhi created https://github.com/llvm/llvm-project/pull/221939

Fix the incorrect relocation type for `LDRSW`. It should be `ELF::R_AARCH64_LDST32_ABS_LO12_NC`, but it was mistakenly set to `ELF::R_AARCH64_LDST64_ABS_LO12_NC` in PR #196051.

>From f17f19448c6658a5bccdf6740a95aeb08e09e74b Mon Sep 17 00:00:00 2001
From: Shanzhi Chen <chenshanzhi at huawei.com>
Date: Tue, 8 Sep 2026 17:35:05 +0800
Subject: [PATCH] [BOLT][AArch64] Fix relocation type for `LDRSW`

Fix the incorrect relocation type for `LDRSW`. It should be
`ELF::R_AARCH64_LDST32_ABS_LO12_NC`, but it was mistakenly set to
`ELF::R_AARCH64_LDST64_ABS_LO12_NC` in PR #196051.
---
 bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index 8d7fee733b9c3..b6e14835e1b22 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -766,7 +766,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
     case AArch64::LDRSWl:
       AddrReg = DataReg;
       OpCode = AArch64::LDRSWui;
-      RelType = ELF::R_AARCH64_LDST64_ABS_LO12_NC;
+      RelType = ELF::R_AARCH64_LDST32_ABS_LO12_NC;
       break;
     default:
       llvm_unreachable("LDR (literal) or LDRSW (literal) expected");



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