[llvm] [SelectionDAG] Preserve element width when scalarizing widened extracts (PR #221165)

[Oscar Priego via llvm-commits]

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@@ -0,0 +1,28 @@
+; RUN: llc -mtriple=riscv64 -mattr=+m,+v < %s | FileCheck %s
+
+define i64 @rotl_extract_widened() #0 {
+; CHECK-LABEL: rotl_extract_widened:
+; CHECK:       lui a0, 15
+; CHECK-NEXT:  addi a0, a0, -106
+; CHECK-NEXT:  ret
+entry:
+  %vec.zero = insertelement <2 x i16> zeroinitializer, i16 0, i32 0
+  %vec.const = xor <2 x i16> %vec.zero, <i16 -7273, i16 -10240>
+  %vec.shifted = call <2 x i16> @llvm.fshl.v2i16(
+      <2 x i16> %vec.const, <2 x i16> %vec.const,
+      <2 x i16> <i16 0, i16 12>)
+
+  %a = extractelement <2 x i16> %vec.shifted, i32 0
+  %az = zext i16 %a to i64
+  %ax = xor i64 %az, 1
+
+  %b = extractelement <2 x i16> %vec.shifted, i32 1
+  %bz = zext i16 %b to i64
+
+  %r = or i64 %ax, %bz
+  ret i64 %r
+}
+
+declare <2 x i16> @llvm.fshl.v2i16(<2 x i16>, <2 x i16>, <2 x i16>)
+
+attributes #0 = { noinline optnone }
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Opriego wrote:

Addressed, Thanks.

https://github.com/llvm/llvm-project/pull/221165