[llvm] CodeGen: Drop inert -fp-contract flags from tests (PR #221709)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 8 01:22:16 PDT 2026
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/221709
>From 5ac7613e34ff2acf73535abc956226b3f67117fe Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Mon, 7 Sep 2026 13:30:34 +0200
Subject: [PATCH] AMDGPU: Rename stale CONTRACT check prefixes in fp-contract
tests
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
---
.../GlobalISel/combine-fma-add-ext-fma.ll | 4 +-
.../GlobalISel/combine-fma-add-fma-mul.ll | 872 +++++++++---------
llvm/test/CodeGen/AMDGPU/fdot2.ll | 46 +-
.../CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll | 6 +-
4 files changed, 461 insertions(+), 467 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
index c012f0cf07821..254f64c74f57b 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -mtriple=amdgpu9.00 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX9-DENORM %s
-; RUN: llc -global-isel -mtriple=amdgpu10.10 < %s | FileCheck -check-prefixes=GFX10,GFX10-CONTRACT %s
+; RUN: llc -global-isel -mtriple=amdgpu10.10 < %s | FileCheck -check-prefix=GFX10 %s
; RUN: llc -global-isel -mtriple=amdgpu10.10 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX10-DENORM %s
; fold (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z))
@@ -358,5 +358,3 @@ declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) #
declare <4 x half> @llvm.fmuladd.v4f16(<4 x half>, <4 x half>, <4 x half>) #0
attributes #0 = { nounwind readnone }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; GFX10-CONTRACT: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
index cbdf1170a3aa0..430bc08a704a4 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -global-isel -mtriple=amdgpu9.00 < %s | FileCheck -check-prefix=GFX9-CONTRACT %s
+; RUN: llc -global-isel -mtriple=amdgpu9.00 < %s | FileCheck -check-prefix=GFX9 %s
; RUN: llc -global-isel -mtriple=amdgpu9.00 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX9-DENORM %s
-; RUN: llc -global-isel -mtriple=amdgpu10.10 < %s | FileCheck -check-prefix=GFX10-CONTRACT %s
+; RUN: llc -global-isel -mtriple=amdgpu10.10 < %s | FileCheck -check-prefix=GFX10 %s
; RUN: llc -global-isel -mtriple=amdgpu10.10 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX10-DENORM %s
-; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11-CONTRACT,GFX11-CONTRACT-TRUE16 %s
-; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11-CONTRACT,GFX11-CONTRACT-FAKE16 %s
+; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
+; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=+real-true16 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefixes=GFX11-DENORM,GFX11-DENORM-TRUE16 %s
; RUN: llc -global-isel -mtriple=amdgpu11.00 -mattr=-real-true16 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefixes=GFX11-DENORM,GFX11-DENORM-FAKE16 %s
@@ -12,12 +12,12 @@
; fadd e, (fma a, b, (fmul c, d)) --> fma a, b, (fma c, d, e)
define float @test_f32_add_mul(float %a, float %b, float %c, float %d, float %e) {
-; GFX9-CONTRACT-LABEL: test_f32_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v1, v2
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f32_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX9-NEXT: v_fma_f32 v0, v0, v1, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f32_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -27,13 +27,13 @@ define float @test_f32_add_mul(float %a, float %b, float %c, float %d, float %e)
; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f32_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f32_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX10-NEXT: v_fmac_f32_e32 v2, v0, v1
+; GFX10-NEXT: v_mov_b32_e32 v0, v2
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f32_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -43,14 +43,14 @@ define float @test_f32_add_mul(float %a, float %b, float %c, float %d, float %e)
; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f32_add_mul:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX11-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f32_add_mul:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_fmac_f32_e32 v2, v0, v1
+; GFX11-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f32_add_mul:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -68,12 +68,12 @@ define float @test_f32_add_mul(float %a, float %b, float %c, float %d, float %e)
}
define float @test_f32_add_mul_rhs(float %a, float %b, float %c, float %d, float %e) {
-; GFX9-CONTRACT-LABEL: test_f32_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v1, v2
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f32_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX9-NEXT: v_fma_f32 v0, v0, v1, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f32_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -83,13 +83,13 @@ define float @test_f32_add_mul_rhs(float %a, float %b, float %c, float %d, float
; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f32_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f32_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX10-NEXT: v_fmac_f32_e32 v2, v0, v1
+; GFX10-NEXT: v_mov_b32_e32 v0, v2
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f32_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -99,14 +99,14 @@ define float @test_f32_add_mul_rhs(float %a, float %b, float %c, float %d, float
; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f32_add_mul_rhs:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f32 v2, v2, v3, v4
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-NEXT: v_fmac_f32_e32 v2, v0, v1
-; GFX11-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f32_add_mul_rhs:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f32 v2, v2, v3, v4
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-NEXT: v_fmac_f32_e32 v2, v0, v1
+; GFX11-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f32_add_mul_rhs:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -124,12 +124,12 @@ define float @test_f32_add_mul_rhs(float %a, float %b, float %c, float %d, float
}
define half @test_half_add_mul(half %a, half %b, half %c, half %d, half %e) {
-; GFX9-CONTRACT-LABEL: test_half_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX9-CONTRACT-NEXT: v_fma_f16 v0, v0, v1, v2
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_half_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX9-NEXT: v_fma_f16 v0, v0, v1, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_half_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -139,13 +139,13 @@ define half @test_half_add_mul(half %a, half %b, half %c, half %d, half %e) {
; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_half_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v2, v0, v1
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_half_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX10-NEXT: v_fmac_f16_e32 v2, v0, v1
+; GFX10-NEXT: v_mov_b32_e32 v0, v2
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_half_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -156,23 +156,23 @@ define half @test_half_add_mul(half %a, half %b, half %c, half %d, half %e) {
; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v0, v4
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-TRUE16-LABEL: test_half_add_mul:
-; GFX11-CONTRACT-TRUE16: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-TRUE16-NEXT: v_fma_f16 v2.l, v2.l, v3.l, v4.l
-; GFX11-CONTRACT-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v1.l
-; GFX11-CONTRACT-TRUE16-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-CONTRACT-FAKE16-LABEL: test_half_add_mul:
-; GFX11-CONTRACT-FAKE16: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-FAKE16-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX11-CONTRACT-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-FAKE16-NEXT: v_fmac_f16_e32 v2, v0, v1
-; GFX11-CONTRACT-FAKE16-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_half_add_mul:
+; GFX11-TRUE16: ; %bb.0: ; %.entry
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_fma_f16 v2.l, v2.l, v3.l, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_half_add_mul:
+; GFX11-FAKE16: ; %bb.0: ; %.entry
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_fmac_f16_e32 v2, v0, v1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-TRUE16-LABEL: test_half_add_mul:
; GFX11-DENORM-TRUE16: ; %bb.0: ; %.entry
@@ -201,12 +201,12 @@ define half @test_half_add_mul(half %a, half %b, half %c, half %d, half %e) {
}
define half @test_half_add_mul_rhs(half %a, half %b, half %c, half %d, half %e) {
-; GFX9-CONTRACT-LABEL: test_half_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX9-CONTRACT-NEXT: v_fma_f16 v0, v0, v1, v2
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_half_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX9-NEXT: v_fma_f16 v0, v0, v1, v2
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_half_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -216,13 +216,13 @@ define half @test_half_add_mul_rhs(half %a, half %b, half %c, half %d, half %e)
; GFX9-DENORM-NEXT: v_mov_b32_e32 v0, v2
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_half_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f16_e32 v2, v0, v1
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v2
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_half_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX10-NEXT: v_fmac_f16_e32 v2, v0, v1
+; GFX10-NEXT: v_mov_b32_e32 v0, v2
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_half_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -233,23 +233,23 @@ define half @test_half_add_mul_rhs(half %a, half %b, half %c, half %d, half %e)
; GFX10-DENORM-NEXT: v_add_f16_e32 v0, v4, v0
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-TRUE16-LABEL: test_half_add_mul_rhs:
-; GFX11-CONTRACT-TRUE16: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-TRUE16-NEXT: v_fma_f16 v2.l, v2.l, v3.l, v4.l
-; GFX11-CONTRACT-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v1.l
-; GFX11-CONTRACT-TRUE16-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-TRUE16-NEXT: s_setpc_b64 s[30:31]
-;
-; GFX11-CONTRACT-FAKE16-LABEL: test_half_add_mul_rhs:
-; GFX11-CONTRACT-FAKE16: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-FAKE16-NEXT: v_fma_f16 v2, v2, v3, v4
-; GFX11-CONTRACT-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
-; GFX11-CONTRACT-FAKE16-NEXT: v_fmac_f16_e32 v2, v0, v1
-; GFX11-CONTRACT-FAKE16-NEXT: v_mov_b32_e32 v0, v2
-; GFX11-CONTRACT-FAKE16-NEXT: s_setpc_b64 s[30:31]
+; GFX11-TRUE16-LABEL: test_half_add_mul_rhs:
+; GFX11-TRUE16: ; %bb.0: ; %.entry
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: v_fma_f16 v2.l, v2.l, v3.l, v4.l
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v2.l, v0.l, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: test_half_add_mul_rhs:
+; GFX11-FAKE16: ; %bb.0: ; %.entry
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: v_fma_f16 v2, v2, v3, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_fmac_f16_e32 v2, v0, v1
+; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v2
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-TRUE16-LABEL: test_half_add_mul_rhs:
; GFX11-DENORM-TRUE16: ; %bb.0: ; %.entry
@@ -278,12 +278,12 @@ define half @test_half_add_mul_rhs(half %a, half %b, half %c, half %d, half %e)
}
define double @test_double_add_mul(double %a, double %b, double %c, double %d, double %e) {
-; GFX9-CONTRACT-LABEL: test_double_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_double_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX9-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_double_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -292,12 +292,12 @@ define double @test_double_add_mul(double %a, double %b, double %c, double %d, d
; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_double_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_double_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX10-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_double_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -306,13 +306,13 @@ define double @test_double_add_mul(double %a, double %b, double %c, double %d, d
; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_double_add_mul:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_double_add_mul:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_double_add_mul:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -329,12 +329,12 @@ define double @test_double_add_mul(double %a, double %b, double %c, double %d, d
}
define double @test_double_add_mul_rhs(double %a, double %b, double %c, double %d, double %e) {
-; GFX9-CONTRACT-LABEL: test_double_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_double_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX9-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_double_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -343,12 +343,12 @@ define double @test_double_add_mul_rhs(double %a, double %b, double %c, double %
; GFX9-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_double_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_double_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX10-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_double_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -357,13 +357,13 @@ define double @test_double_add_mul_rhs(double %a, double %b, double %c, double %
; GFX10-DENORM-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_double_add_mul_rhs:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_1)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_double_add_mul_rhs:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f64 v[4:5], v[4:5], v[6:7], v[8:9]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_fma_f64 v[0:1], v[0:1], v[2:3], v[4:5]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_double_add_mul_rhs:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -380,18 +380,18 @@ define double @test_double_add_mul_rhs(double %a, double %b, double %c, double %
}
define <4 x float> @test_v4f32_add_mul(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e) {
-; GFX9-CONTRACT-LABEL: test_v4f32_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX9-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX9-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX9-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v4, v8
-; GFX9-CONTRACT-NEXT: v_fma_f32 v1, v1, v5, v9
-; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v6, v10
-; GFX9-CONTRACT-NEXT: v_fma_f32 v3, v3, v7, v11
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_v4f32_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX9-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX9-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX9-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX9-NEXT: v_fma_f32 v0, v0, v4, v8
+; GFX9-NEXT: v_fma_f32 v1, v1, v5, v9
+; GFX9-NEXT: v_fma_f32 v2, v2, v6, v10
+; GFX9-NEXT: v_fma_f32 v3, v3, v7, v11
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_v4f32_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -410,22 +410,22 @@ define <4 x float> @test_v4f32_add_mul(<4 x float> %a, <4 x float> %b, <4 x floa
; GFX9-DENORM-NEXT: v_mov_b32_e32 v3, v6
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_v4f32_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX10-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX10-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX10-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v8, v0, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v9, v1, v5
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v10, v2, v6
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v11, v3, v7
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v8
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v1, v9
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v2, v10
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v3, v11
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_v4f32_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX10-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX10-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX10-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX10-NEXT: v_fmac_f32_e32 v8, v0, v4
+; GFX10-NEXT: v_fmac_f32_e32 v9, v1, v5
+; GFX10-NEXT: v_fmac_f32_e32 v10, v2, v6
+; GFX10-NEXT: v_fmac_f32_e32 v11, v3, v7
+; GFX10-NEXT: v_mov_b32_e32 v0, v8
+; GFX10-NEXT: v_mov_b32_e32 v1, v9
+; GFX10-NEXT: v_mov_b32_e32 v2, v10
+; GFX10-NEXT: v_mov_b32_e32 v3, v11
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_v4f32_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -444,20 +444,20 @@ define <4 x float> @test_v4f32_add_mul(<4 x float> %a, <4 x float> %b, <4 x floa
; GFX10-DENORM-NEXT: v_mov_b32_e32 v3, v11
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_v4f32_add_mul:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX11-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX11-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX11-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_dual_fmac_f32 v8, v0, v4 :: v_dual_fmac_f32 v9, v1, v5
-; GFX11-CONTRACT-NEXT: v_dual_fmac_f32 v10, v2, v6 :: v_dual_fmac_f32 v11, v3, v7
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
-; GFX11-CONTRACT-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_v4f32_add_mul:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX11-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX11-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX11-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_fmac_f32 v8, v0, v4 :: v_dual_fmac_f32 v9, v1, v5
+; GFX11-NEXT: v_dual_fmac_f32 v10, v2, v6 :: v_dual_fmac_f32 v11, v3, v7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
+; GFX11-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_v4f32_add_mul:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -481,18 +481,18 @@ define <4 x float> @test_v4f32_add_mul(<4 x float> %a, <4 x float> %b, <4 x floa
}
define <4 x float> @test_v4f32_add_mul_rhs(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d, <4 x float> %e) {
-; GFX9-CONTRACT-LABEL: test_v4f32_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX9-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX9-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX9-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX9-CONTRACT-NEXT: v_fma_f32 v0, v0, v4, v8
-; GFX9-CONTRACT-NEXT: v_fma_f32 v1, v1, v5, v9
-; GFX9-CONTRACT-NEXT: v_fma_f32 v2, v2, v6, v10
-; GFX9-CONTRACT-NEXT: v_fma_f32 v3, v3, v7, v11
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_v4f32_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX9-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX9-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX9-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX9-NEXT: v_fma_f32 v0, v0, v4, v8
+; GFX9-NEXT: v_fma_f32 v1, v1, v5, v9
+; GFX9-NEXT: v_fma_f32 v2, v2, v6, v10
+; GFX9-NEXT: v_fma_f32 v3, v3, v7, v11
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_v4f32_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -511,22 +511,22 @@ define <4 x float> @test_v4f32_add_mul_rhs(<4 x float> %a, <4 x float> %b, <4 x
; GFX9-DENORM-NEXT: v_mov_b32_e32 v3, v6
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_v4f32_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX10-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX10-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX10-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v8, v0, v4
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v9, v1, v5
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v10, v2, v6
-; GFX10-CONTRACT-NEXT: v_fmac_f32_e32 v11, v3, v7
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v0, v8
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v1, v9
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v2, v10
-; GFX10-CONTRACT-NEXT: v_mov_b32_e32 v3, v11
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_v4f32_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX10-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX10-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX10-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX10-NEXT: v_fmac_f32_e32 v8, v0, v4
+; GFX10-NEXT: v_fmac_f32_e32 v9, v1, v5
+; GFX10-NEXT: v_fmac_f32_e32 v10, v2, v6
+; GFX10-NEXT: v_fmac_f32_e32 v11, v3, v7
+; GFX10-NEXT: v_mov_b32_e32 v0, v8
+; GFX10-NEXT: v_mov_b32_e32 v1, v9
+; GFX10-NEXT: v_mov_b32_e32 v2, v10
+; GFX10-NEXT: v_mov_b32_e32 v3, v11
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_v4f32_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -545,20 +545,20 @@ define <4 x float> @test_v4f32_add_mul_rhs(<4 x float> %a, <4 x float> %b, <4 x
; GFX10-DENORM-NEXT: v_mov_b32_e32 v3, v11
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_v4f32_add_mul_rhs:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f32 v8, v8, v12, v16
-; GFX11-CONTRACT-NEXT: v_fma_f32 v9, v9, v13, v17
-; GFX11-CONTRACT-NEXT: v_fma_f32 v10, v10, v14, v18
-; GFX11-CONTRACT-NEXT: v_fma_f32 v11, v11, v15, v19
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_dual_fmac_f32 v8, v0, v4 :: v_dual_fmac_f32 v9, v1, v5
-; GFX11-CONTRACT-NEXT: v_dual_fmac_f32 v10, v2, v6 :: v_dual_fmac_f32 v11, v3, v7
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
-; GFX11-CONTRACT-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_v4f32_add_mul_rhs:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_fma_f32 v8, v8, v12, v16
+; GFX11-NEXT: v_fma_f32 v9, v9, v13, v17
+; GFX11-NEXT: v_fma_f32 v10, v10, v14, v18
+; GFX11-NEXT: v_fma_f32 v11, v11, v15, v19
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_fmac_f32 v8, v0, v4 :: v_dual_fmac_f32 v9, v1, v5
+; GFX11-NEXT: v_dual_fmac_f32 v10, v2, v6 :: v_dual_fmac_f32 v11, v3, v7
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
+; GFX11-NEXT: v_dual_mov_b32 v2, v10 :: v_dual_mov_b32 v3, v11
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_v4f32_add_mul_rhs:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -582,14 +582,14 @@ define <4 x float> @test_v4f32_add_mul_rhs(<4 x float> %a, <4 x float> %b, <4 x
}
define <4 x half> @test_f16_add_mul(<4 x half> %a, <4 x half> %b, <4 x half> %c, <4 x half> %d, <4 x half> %e) {
-; GFX9-CONTRACT-LABEL: test_f16_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f16_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX9-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX9-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX9-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f16_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -604,14 +604,14 @@ define <4 x half> @test_f16_add_mul(<4 x half> %a, <4 x half> %b, <4 x half> %c,
; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v1, v9
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f16_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f16_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX10-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX10-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX10-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f16_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -626,15 +626,15 @@ define <4 x half> @test_f16_add_mul(<4 x half> %a, <4 x half> %b, <4 x half> %c,
; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v1, v9
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f16_add_mul:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f16_add_mul:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX11-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX11-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f16_add_mul:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -658,14 +658,14 @@ define <4 x half> @test_f16_add_mul(<4 x half> %a, <4 x half> %b, <4 x half> %c,
}
define <4 x half> @test_f16_add_mul_rhs(<4 x half> %a, <4 x half> %b, <4 x half> %c, <4 x half> %d, <4 x half> %e) {
-; GFX9-CONTRACT-LABEL: test_f16_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX9-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f16_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX9-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX9-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX9-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f16_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -680,14 +680,14 @@ define <4 x half> @test_f16_add_mul_rhs(<4 x half> %a, <4 x half> %b, <4 x half>
; GFX9-DENORM-NEXT: v_pk_add_f16 v1, v9, v1
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f16_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX10-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f16_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX10-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX10-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX10-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f16_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -702,15 +702,15 @@ define <4 x half> @test_f16_add_mul_rhs(<4 x half> %a, <4 x half> %b, <4 x half>
; GFX10-DENORM-NEXT: v_pk_add_f16 v1, v9, v1
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f16_add_mul_rhs:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v4, v4, v6, v8
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v5, v5, v7, v9
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v0, v0, v2, v4
-; GFX11-CONTRACT-NEXT: v_pk_fma_f16 v1, v1, v3, v5
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f16_add_mul_rhs:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: v_pk_fma_f16 v4, v4, v6, v8
+; GFX11-NEXT: v_pk_fma_f16 v5, v5, v7, v9
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
+; GFX11-NEXT: v_pk_fma_f16 v0, v0, v2, v4
+; GFX11-NEXT: v_pk_fma_f16 v1, v1, v3, v5
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f16_add_mul_rhs:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -734,31 +734,31 @@ define <4 x half> @test_f16_add_mul_rhs(<4 x half> %a, <4 x half> %b, <4 x half>
}
define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x double> %c, <4 x double> %d, <4 x double> %e) {
-; GFX9-CONTRACT-LABEL: test_f64_add_mul:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
-; GFX9-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[31:32]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:16
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[24:25]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:24
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[24:25]
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f64_add_mul:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[31:32]
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:16
+; GFX9-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[24:25]
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:24
+; GFX9-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25]
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32
+; GFX9-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[24:25]
+; GFX9-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f64_add_mul:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -786,32 +786,32 @@ define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x dou
; GFX9-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f64_add_mul:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: s_clause 0x8
-; GFX10-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
-; GFX10-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
-; GFX10-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12
-; GFX10-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16
-; GFX10-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20
-; GFX10-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
-; GFX10-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28
-; GFX10-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(6)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(4)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(2)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f64_add_mul:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: s_clause 0x8
+; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
+; GFX10-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
+; GFX10-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12
+; GFX10-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16
+; GFX10-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20
+; GFX10-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
+; GFX10-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28
+; GFX10-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32
+; GFX10-NEXT: s_waitcnt vmcnt(6)
+; GFX10-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
+; GFX10-NEXT: s_waitcnt vmcnt(4)
+; GFX10-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
+; GFX10-NEXT: s_waitcnt vmcnt(2)
+; GFX10-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
+; GFX10-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX10-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX10-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX10-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f64_add_mul:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -840,34 +840,34 @@ define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x dou
; GFX10-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f64_add_mul:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: s_clause 0x8
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v32, off, s32 offset:4
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v33, off, s32 offset:8
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v34, off, s32 offset:12
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v35, off, s32 offset:16
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v36, off, s32 offset:20
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v37, off, s32 offset:24
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v38, off, s32 offset:28
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v39, off, s32 offset:32
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(6)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(2)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f64_add_mul:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_clause 0x8
+; GFX11-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-NEXT: scratch_load_b32 v32, off, s32 offset:4
+; GFX11-NEXT: scratch_load_b32 v33, off, s32 offset:8
+; GFX11-NEXT: scratch_load_b32 v34, off, s32 offset:12
+; GFX11-NEXT: scratch_load_b32 v35, off, s32 offset:16
+; GFX11-NEXT: scratch_load_b32 v36, off, s32 offset:20
+; GFX11-NEXT: scratch_load_b32 v37, off, s32 offset:24
+; GFX11-NEXT: scratch_load_b32 v38, off, s32 offset:28
+; GFX11-NEXT: scratch_load_b32 v39, off, s32 offset:32
+; GFX11-NEXT: s_waitcnt vmcnt(6)
+; GFX11-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
+; GFX11-NEXT: s_waitcnt vmcnt(4)
+; GFX11-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
+; GFX11-NEXT: s_waitcnt vmcnt(2)
+; GFX11-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX11-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX11-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f64_add_mul:
; GFX11-DENORM: ; %bb.0: ; %.entry
@@ -905,31 +905,31 @@ define <4 x double> @test_f64_add_mul(<4 x double> %a, <4 x double> %b, <4 x dou
}
define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x double> %c, <4 x double> %d, <4 x double> %e) {
-; GFX9-CONTRACT-LABEL: test_f64_add_mul_rhs:
-; GFX9-CONTRACT: ; %bb.0: ; %.entry
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
-; GFX9-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[31:32]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:16
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[24:25]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:24
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25]
-; GFX9-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX9-CONTRACT-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28
-; GFX9-CONTRACT-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX9-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[24:25]
-; GFX9-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX9-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX9-LABEL: test_f64_add_mul_rhs:
+; GFX9: ; %bb.0: ; %.entry
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:4
+; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:8
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[31:32]
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:12
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:16
+; GFX9-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[24:25]
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:20
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:24
+; GFX9-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[24:25]
+; GFX9-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX9-NEXT: buffer_load_dword v24, off, s[0:3], s32 offset:28
+; GFX9-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:32
+; GFX9-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[24:25]
+; GFX9-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX9-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-DENORM-LABEL: test_f64_add_mul_rhs:
; GFX9-DENORM: ; %bb.0: ; %.entry
@@ -957,32 +957,32 @@ define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x
; GFX9-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
; GFX9-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX10-CONTRACT-LABEL: test_f64_add_mul_rhs:
-; GFX10-CONTRACT: ; %bb.0: ; %.entry
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX10-CONTRACT-NEXT: s_clause 0x8
-; GFX10-CONTRACT-NEXT: buffer_load_dword v31, off, s[0:3], s32
-; GFX10-CONTRACT-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
-; GFX10-CONTRACT-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
-; GFX10-CONTRACT-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12
-; GFX10-CONTRACT-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16
-; GFX10-CONTRACT-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20
-; GFX10-CONTRACT-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
-; GFX10-CONTRACT-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28
-; GFX10-CONTRACT-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(6)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(4)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(2)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
-; GFX10-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX10-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX10-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX10-LABEL: test_f64_add_mul_rhs:
+; GFX10: ; %bb.0: ; %.entry
+; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX10-NEXT: s_clause 0x8
+; GFX10-NEXT: buffer_load_dword v31, off, s[0:3], s32
+; GFX10-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:4
+; GFX10-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:8
+; GFX10-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:12
+; GFX10-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:16
+; GFX10-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:20
+; GFX10-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:24
+; GFX10-NEXT: buffer_load_dword v38, off, s[0:3], s32 offset:28
+; GFX10-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:32
+; GFX10-NEXT: s_waitcnt vmcnt(6)
+; GFX10-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
+; GFX10-NEXT: s_waitcnt vmcnt(4)
+; GFX10-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
+; GFX10-NEXT: s_waitcnt vmcnt(2)
+; GFX10-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
+; GFX10-NEXT: s_waitcnt vmcnt(0)
+; GFX10-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
+; GFX10-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX10-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX10-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX10-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-DENORM-LABEL: test_f64_add_mul_rhs:
; GFX10-DENORM: ; %bb.0: ; %.entry
@@ -1011,34 +1011,34 @@ define <4 x double> @test_f64_add_mul_rhs(<4 x double> %a, <4 x double> %b, <4 x
; GFX10-DENORM-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
; GFX10-DENORM-NEXT: s_setpc_b64 s[30:31]
;
-; GFX11-CONTRACT-LABEL: test_f64_add_mul_rhs:
-; GFX11-CONTRACT: ; %bb.0: ; %.entry
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-CONTRACT-NEXT: s_clause 0x8
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v31, off, s32
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v32, off, s32 offset:4
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v33, off, s32 offset:8
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v34, off, s32 offset:12
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v35, off, s32 offset:16
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v36, off, s32 offset:20
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v37, off, s32 offset:24
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v38, off, s32 offset:28
-; GFX11-CONTRACT-NEXT: scratch_load_b32 v39, off, s32 offset:32
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(6)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(2)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
-; GFX11-CONTRACT-NEXT: s_waitcnt vmcnt(0)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
-; GFX11-CONTRACT-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
-; GFX11-CONTRACT-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
-; GFX11-CONTRACT-NEXT: s_setpc_b64 s[30:31]
+; GFX11-LABEL: test_f64_add_mul_rhs:
+; GFX11: ; %bb.0: ; %.entry
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_clause 0x8
+; GFX11-NEXT: scratch_load_b32 v31, off, s32
+; GFX11-NEXT: scratch_load_b32 v32, off, s32 offset:4
+; GFX11-NEXT: scratch_load_b32 v33, off, s32 offset:8
+; GFX11-NEXT: scratch_load_b32 v34, off, s32 offset:12
+; GFX11-NEXT: scratch_load_b32 v35, off, s32 offset:16
+; GFX11-NEXT: scratch_load_b32 v36, off, s32 offset:20
+; GFX11-NEXT: scratch_load_b32 v37, off, s32 offset:24
+; GFX11-NEXT: scratch_load_b32 v38, off, s32 offset:28
+; GFX11-NEXT: scratch_load_b32 v39, off, s32 offset:32
+; GFX11-NEXT: s_waitcnt vmcnt(6)
+; GFX11-NEXT: v_fma_f64 v[16:17], v[16:17], v[24:25], v[32:33]
+; GFX11-NEXT: s_waitcnt vmcnt(4)
+; GFX11-NEXT: v_fma_f64 v[18:19], v[18:19], v[26:27], v[34:35]
+; GFX11-NEXT: s_waitcnt vmcnt(2)
+; GFX11-NEXT: v_fma_f64 v[20:21], v[20:21], v[28:29], v[36:37]
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: v_fma_f64 v[22:23], v[22:23], v[30:31], v[38:39]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[16:17]
+; GFX11-NEXT: v_fma_f64 v[2:3], v[2:3], v[10:11], v[18:19]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-NEXT: v_fma_f64 v[4:5], v[4:5], v[12:13], v[20:21]
+; GFX11-NEXT: v_fma_f64 v[6:7], v[6:7], v[14:15], v[22:23]
+; GFX11-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-DENORM-LABEL: test_f64_add_mul_rhs:
; GFX11-DENORM: ; %bb.0: ; %.entry
diff --git a/llvm/test/CodeGen/AMDGPU/fdot2.ll b/llvm/test/CodeGen/AMDGPU/fdot2.ll
index c03e41052535e..7a4984931bb17 100644
--- a/llvm/test/CodeGen/AMDGPU/fdot2.ll
+++ b/llvm/test/CodeGen/AMDGPU/fdot2.ll
@@ -1,10 +1,10 @@
; RUN: llc -mtriple=amdgpu9.00 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GFX900
; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX906-DL-UNSAFE
-; RUN: llc -mtriple=amdgpu10.11 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10-CONTRACT
-; RUN: llc -mtriple=amdgpu10.12 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10-CONTRACT
+; RUN: llc -mtriple=amdgpu10.11 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10
+; RUN: llc -mtriple=amdgpu10.12 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GCN-DL-UNSAFE,GFX10-DL-UNSAFE,GFX10
; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GFX906
-; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GFX906-CONTRACT
-; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math=ieee < %s | FileCheck %s -check-prefixes=GCN,GFX906-DENORM-CONTRACT
+; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GFX906-DENORM
+; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math=ieee < %s | FileCheck %s -check-prefixes=GCN,GFX906-IEEE
; RUN: llc -mtriple=amdgpu9.06 -denormal-fp-math-f32=preserve-sign -mattr="+dot7-insts,-dot10-insts" < %s | FileCheck %s -check-prefixes=GCN,GFX906-DOT10-DISABLED
; RUN: llc -mtriple=amdgpu9.0a -denormal-fp-math-f32=preserve-sign < %s | FileCheck %s -check-prefixes=GCN,GFX90A-PS
; RUN: llc -mtriple=amdgpu9.0a -denormal-fp-math-f32=ieee < %s | FileCheck %s -check-prefixes=GCN,GFX90A-IEEE
@@ -19,10 +19,10 @@
; GFX900: v_fma_f16
; GFX906-DL-UNSAFE: v_fma_f16
-; GFX10-CONTRACT: v_fmac_f16
+; GFX10: v_fmac_f16
-; GFX906-CONTRACT: v_mac_f16_e32
-; GFX906-DENORM-CONTRACT: v_fma_f16
+; GFX906-DENORM: v_mac_f16_e32
+; GFX906-IEEE: v_fma_f16
; GFX906-DOT10-DISABLED: v_fma_f16
define amdgpu_kernel void @dotproduct_f16_contract(ptr addrspace(1) %src1,
@@ -84,9 +84,9 @@ entry:
; GFX906-DL-UNSAFE: v_fma_mix_f32
; GFX10-DL-UNSAFE: v_fma_mix_f32
-; GFX906-CONTRACT: v_fma_mix_f32
+; GFX906-DENORM: v_fma_mix_f32
-; GFX906-DENORM-CONTRACT: v_dot2_f32_f16
+; GFX906-IEEE: v_dot2_f32_f16
; GFX906-DOT10-DISABLED: v_fma_mix_f32
; GFX90A-PS: v_dot2c_f32_f16
; GFX90A-IEEE: v_fma_mix_f32
@@ -158,8 +158,8 @@ entry:
; GFX906-DL-UNSAFE: v_fma_mix_f32
; GFX10-DL-UNSAFE: v_fma_mix_f32
-; GFX906-CONTRACT: v_fma_mix_f32
-; GFX906-DENORM-CONTRACT: v_dot2_f32_f16
+; GFX906-DENORM: v_fma_mix_f32
+; GFX906-IEEE: v_dot2_f32_f16
; GFX906-DOT10-DISABLED: v_fma_mix_f32
; GFX90A-PS: v_dot2c_f32_f16
; GFX90A-IEEE: v_fma_mix_f32
@@ -227,8 +227,8 @@ entry:
; GCN-DL-UNSAFE: v_fma_mix_f32
-; GFX906-CONTRACT: v_fma_mix_f32
-; GFX906-DENORM-CONTRACT: v_fma_mix_f32
+; GFX906-DENORM: v_fma_mix_f32
+; GFX906-IEEE: v_fma_mix_f32
; GFX906-DOT10-DISABLED: v_fma_mix_f32
define amdgpu_kernel void @dotproduct_v4f16_contract(ptr addrspace(1) %src1,
ptr addrspace(1) %src2,
@@ -292,8 +292,8 @@ entry:
; GCN-DL-UNSAFE: v_fma_mix_f32
-; GFX906-CONTRACT: v_fma_mix_f32
-; GFX906-DENORM-CONTRACT: v_fma_mix_f32
+; GFX906-DENORM: v_fma_mix_f32
+; GFX906-IEEE: v_fma_mix_f32
; GFX906-DOT10-DISABLED: v_fma_mix_f32
define amdgpu_kernel void @NotAdotproductContract(ptr addrspace(1) %src1,
ptr addrspace(1) %src2,
@@ -358,8 +358,8 @@ entry:
; GCN-DL-UNSAFE: v_fma_mix_f32
-; GFX906-CONTRACT: v_fma_mix_f32
-; GFX906-DENORM-CONTRACT: v_fma_mix_f32
+; GFX906-DENORM: v_fma_mix_f32
+; GFX906-IEEE: v_fma_mix_f32
; GFX906-DOT10-DISABLED: v_fma_mix_f32
define amdgpu_kernel void @Diff_Idx_NotAdotproductContract(ptr addrspace(1) %src1,
ptr addrspace(1) %src2,
@@ -470,8 +470,8 @@ define amdgpu_kernel void @dotproduct_f16_f32_contract_dynamic_denorm(<2 x half>
; afn on both FMAs overrides the denormal gating: the caller accepts approximate
; results, so dot2's subnormal flushing is acceptable regardless of mode or GPU.
; GCN-LABEL: {{^}}dotproduct_f16_f32_afn
-; GFX906-CONTRACT: v_dot2_f32_f16
-; GFX906-DENORM-CONTRACT: v_dot2_f32_f16
+; GFX906-DENORM: v_dot2_f32_f16
+; GFX906-IEEE: v_dot2_f32_f16
; GFX90A-PS: v_dot2c_f32_f16
; GFX90A-IEEE: v_dot2c_f32_f16
; GFX950-DENORM: v_dot2c_f32_f16
@@ -495,8 +495,8 @@ define amdgpu_kernel void @dotproduct_f16_f32_afn(<2 x half> %a, <2 x half> %b,
; fdot2 hardwires lanes 0/1, so it must not fold when %i == %j at runtime.
; GCN-LABEL: {{^}}Var_Idx_NotAdotproductContract
-; GFX906-DENORM-CONTRACT-NOT: v_dot2
-; GFX906-DENORM-CONTRACT: v_fma_mix_f32
+; GFX906-IEEE-NOT: v_dot2
+; GFX906-IEEE: v_fma_mix_f32
; GFX90A-PS-NOT: v_dot2
; GFX90A-PS: v_fma_mix_f32
define float @Var_Idx_NotAdotproductContract(<2 x half> %src1, <2 x half> %src2, float %acc, i32 %i, i32 %j) {
@@ -519,8 +519,8 @@ define float @Var_Idx_NotAdotproductContract(<2 x half> %src1, <2 x half> %src2,
; A mix of a constant and a variable index must not fold either.
; GCN-LABEL: {{^}}Mixed_Idx_NotAdotproductContract
-; GFX906-DENORM-CONTRACT-NOT: v_dot2
-; GFX906-DENORM-CONTRACT: v_fma_mix_f32
+; GFX906-IEEE-NOT: v_dot2
+; GFX906-IEEE: v_fma_mix_f32
; GFX90A-PS-NOT: v_dot2
; GFX90A-PS: v_fma_mix_f32
define float @Mixed_Idx_NotAdotproductContract(<2 x half> %src1, <2 x half> %src2, float %acc, i32 %j) {
diff --git a/llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll b/llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
index 77ca9241cbdbc..e419128480dd4 100644
--- a/llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
+++ b/llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -S -passes='simplifycfg<hoist-common-insts>' -mtriple=amdgpu10.30-- < %s | FileCheck -check-prefixes=GFX,FP-CONTRACT-FAST,UNSAFE-FP-MATH,NO-UNSAFE-FP-MATH %s
+; RUN: opt -S -passes='simplifycfg<hoist-common-insts>' -mtriple=amdgpu10.30-- < %s | FileCheck -check-prefix=GFX %s
define double @is_profitable_f64_contract(ptr dereferenceable(8) %ptr_x, ptr dereferenceable(8) %ptr_y, ptr dereferenceable(8) %ptr_a) #0 {
; GFX-LABEL: define double @is_profitable_f64_contract(
@@ -398,7 +398,3 @@ if.else: ; preds = %entry
attributes #0 = { nounwind denormal_fpenv(preservesign) }
attributes #1 = { nounwind denormal_fpenv(ieee|ieee) }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; FP-CONTRACT-FAST: {{.*}}
-; NO-UNSAFE-FP-MATH: {{.*}}
-; UNSAFE-FP-MATH: {{.*}}
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