[llvm] [CodeGen][AMDGPU] Allow elementwise atomic load/store at element alignment (PR #219906)

[Harrison Hao via llvm-commits]

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@@ -264,23 +295,25 @@ static void copyMetadataForAtomic(Instruction &Dest,
 }
 
 template <typename Inst>
-static bool atomicSizeSupported(const TargetLowering *TLI, Inst *I) {
-  unsigned Size = getAtomicOpSize(I);
-  Align Alignment = I->getAlign();
+static bool atomicSizeSupported(const TargetLowering *TLI, const DataLayout &DL,
+                                Inst *I) {
   unsigned MaxSize = TLI->getMaxAtomicSizeInBitsSupported() / 8;
-  return Alignment >= Size && Size <= MaxSize;
+  return I->getAlign() >= getRequiredAtomicSize(TLI, DL, I) &&
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harrisonGPU wrote:

Right, AtomicExpand previously required whole access alignment unconditionally, independently of the target's alignment hook.

https://github.com/llvm/llvm-project/pull/219906