[llvm] [AMDGPU] Promote allocas used by phi/select (PR #221870)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 7 21:20:51 PDT 2026
github-actions[bot] wrote:
<!--PREMERGE ADVISOR COMMENT: Linux-->
# :penguin: Linux x64 Test Results
* 152721 tests passed
* 3268 tests skipped
* 2 tests failed
## Failed Tests
(click on a test name to see its output)
### LLVM
<details>
<summary>LLVM.tools/UpdateTestChecks/update_llc_test_checks/amdgpu-isel-support.test</summary>
```
Exit Code: 1
Command Output (stdout):
--
# RUN: at line 5
cp -f /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll && '/usr/bin/python3' /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary /home/gha/actions-runner/_work/llvm-project/llvm-project/build/bin/llc --version=1 /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# executed command: cp -f /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# note: command had no output on stdout or stderr
# executed command: /usr/bin/python3 /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary /home/gha/actions-runner/_work/llvm-project/llvm-project/build/bin/llc --version=1 /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# note: command had no output on stdout or stderr
# RUN: at line 6
cat /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected > /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.expected.ll
# executed command: cat /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected
# note: command had no output on stdout or stderr
# RUN: at line 7
diff -u /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.expected.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# executed command: diff -u /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.expected.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# .---command stdout------------
# | --- /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.expected.ll
# | +++ /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu-isel-support.test.tmp.ll
# | @@ -3,20 +3,18 @@
# |
# | define i64 @i64_test(i64 %i) nounwind readnone {
# | ; CHECK-LABEL: i64_test:
# | -; CHECK: SelectionDAG has 26 nodes:
# | +; CHECK: SelectionDAG has 19 nodes:
# | ; CHECK-NEXT: t0: ch,glue = EntryToken
# | ; CHECK-NEXT: t2: i32,ch = CopyFromReg # D:1 t0, Register:i32 %8
# | ; CHECK-NEXT: t4: i32,ch = CopyFromReg # D:1 t0, Register:i32 %9
# | -; CHECK-NEXT: t51: i64 = REG_SEQUENCE # D:1 TargetConstant:i32<67>, t2, TargetConstant:i32<3>, t4, TargetConstant:i32<11>
# | -; CHECK-NEXT: t27: i32,ch = BUFFER_LOAD_DWORD_OFFEN<Mem:(dereferenceable load (s32) from %ir.loc, align 8, addrspace 5)> TargetFrameIndex:i32<0>, Register:v4i32 $sgpr0_sgpr1_sgpr2_sgpr3, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i1<0>, t0
# | -; CHECK-NEXT: t30: i32,ch = BUFFER_LOAD_DWORD_OFFEN<Mem:(dereferenceable load (s32) from %ir.loc + 4, basealign 8, addrspace 5)> TargetFrameIndex:i32<0>, Register:v4i32 $sgpr0_sgpr1_sgpr2_sgpr3, TargetConstant:i32<0>, TargetConstant:i32<4>, TargetConstant:i32<0>, TargetConstant:i1<0>, t0
# | -; CHECK-NEXT: t33: v2i32 = REG_SEQUENCE # D:1 TargetConstant:i32<37>, t27, TargetConstant:i32<3>, t30, TargetConstant:i32<11>
# | -; CHECK-NEXT: t10: i64 = V_ADD_U64_PSEUDO # D:1 t51, t33
# | -; CHECK-NEXT: t24: i32 = EXTRACT_SUBREG # D:1 t10, TargetConstant:i32<3>
# | -; CHECK-NEXT: t17: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t24
# | -; CHECK-NEXT: t39: i32 = EXTRACT_SUBREG # D:1 t10, TargetConstant:i32<11>
# | -; CHECK-NEXT: t19: ch,glue = CopyToReg # D:1 t17, Register:i32 $vgpr1, t39, t17:1
# | -; CHECK-NEXT: t20: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t19, t19:1
# | +; CHECK-NEXT: t35: i64 = REG_SEQUENCE # D:1 TargetConstant:i32<67>, t2, TargetConstant:i32<3>, t4, TargetConstant:i32<11>
# | +; CHECK-NEXT: t21: i64 = COPY IMPLICIT_DEF:i64
# | +; CHECK-NEXT: t9: i64 = V_ADD_U64_PSEUDO # D:1 t35, t21
# | +; CHECK-NEXT: t25: i32 = EXTRACT_SUBREG # D:1 t9, TargetConstant:i32<3>
# | +; CHECK-NEXT: t16: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t25
# | +; CHECK-NEXT: t29: i32 = EXTRACT_SUBREG # D:1 t9, TargetConstant:i32<11>
# | +; CHECK-NEXT: t18: ch,glue = CopyToReg # D:1 t16, Register:i32 $vgpr1, t29, t16:1
# | +; CHECK-NEXT: t19: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t18, t18:1
# | ; CHECK-EMPTY:
# | %loc = alloca i64, addrspace(5)
# | %j = load i64, ptr addrspace(5) %loc
# | @@ -26,15 +24,15 @@
# |
# | define i64 @i32_test(i32 %i) nounwind readnone {
# | ; CHECK-LABEL: i32_test:
# | -; CHECK: SelectionDAG has 15 nodes:
# | +; CHECK: SelectionDAG has 14 nodes:
# | ; CHECK-NEXT: t0: ch,glue = EntryToken
# | ; CHECK-NEXT: t2: i32,ch = CopyFromReg # D:1 t0, Register:i32 %8
# | -; CHECK-NEXT: t6: i32,ch = BUFFER_LOAD_DWORD_OFFEN<Mem:(dereferenceable load (s32) from %ir.loc, addrspace 5)> TargetFrameIndex:i32<0>, Register:v4i32 $sgpr0_sgpr1_sgpr2_sgpr3, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i1<0>, t0
# | -; CHECK-NEXT: t7: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t6, TargetConstant:i1<0>
# | -; CHECK-NEXT: t15: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t7
# | +; CHECK-NEXT: t19: i32 = COPY IMPLICIT_DEF:i32
# | +; CHECK-NEXT: t6: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t19, TargetConstant:i1<0>
# | +; CHECK-NEXT: t14: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t6
# | ; CHECK-NEXT: t24: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
# | -; CHECK-NEXT: t17: ch,glue = CopyToReg t15, Register:i32 $vgpr1, t24, t15:1
# | -; CHECK-NEXT: t18: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t17, t17:1
# | +; CHECK-NEXT: t16: ch,glue = CopyToReg t14, Register:i32 $vgpr1, t24, t14:1
# | +; CHECK-NEXT: t17: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t16, t16:1
# | ; CHECK-EMPTY:
# | %loc = alloca i32, addrspace(5)
# | %j = load i32, ptr addrspace(5) %loc
# | @@ -45,17 +43,17 @@
# |
# | define i64 @i16_test(i16 %i) nounwind readnone {
# | ; CHECK-LABEL: i16_test:
# | -; CHECK: SelectionDAG has 18 nodes:
# | +; CHECK: SelectionDAG has 17 nodes:
# | ; CHECK-NEXT: t0: ch,glue = EntryToken
# | ; CHECK-NEXT: t2: i32,ch = CopyFromReg # D:1 t0, Register:i32 %8
# | -; CHECK-NEXT: t20: i32,ch = BUFFER_LOAD_USHORT_OFFEN<Mem:(dereferenceable load (s16) from %ir.loc, addrspace 5)> TargetFrameIndex:i32<0>, Register:v4i32 $sgpr0_sgpr1_sgpr2_sgpr3, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i1<0>, t0
# | -; CHECK-NEXT: t21: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t20, TargetConstant:i1<0>
# | -; CHECK-NEXT: t25: i32 = S_MOV_B32 TargetConstant:i32<65535>
# | -; CHECK-NEXT: t26: i32 = V_AND_B32_e64 # D:1 t21, t25
# | -; CHECK-NEXT: t16: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t26
# | -; CHECK-NEXT: t33: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
# | -; CHECK-NEXT: t18: ch,glue = CopyToReg t16, Register:i32 $vgpr1, t33, t16:1
# | -; CHECK-NEXT: t19: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t18, t18:1
# | +; CHECK-NEXT: t23: i32 = COPY IMPLICIT_DEF:i32
# | +; CHECK-NEXT: t24: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t23, TargetConstant:i1<0>
# | +; CHECK-NEXT: t28: i32 = S_MOV_B32 TargetConstant:i32<65535>
# | +; CHECK-NEXT: t29: i32 = V_AND_B32_e64 # D:1 t24, t28
# | +; CHECK-NEXT: t15: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t29
# | +; CHECK-NEXT: t35: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
# | +; CHECK-NEXT: t17: ch,glue = CopyToReg t15, Register:i32 $vgpr1, t35, t15:1
# | +; CHECK-NEXT: t18: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t17, t17:1
# | ; CHECK-EMPTY:
# | %loc = alloca i16, addrspace(5)
# | %j = load i16, ptr addrspace(5) %loc
# | @@ -66,17 +64,17 @@
# |
# | define i64 @i8_test(i8 %i) nounwind readnone {
# | ; CHECK-LABEL: i8_test:
# | -; CHECK: SelectionDAG has 18 nodes:
# | +; CHECK: SelectionDAG has 17 nodes:
# | ; CHECK-NEXT: t0: ch,glue = EntryToken
# | ; CHECK-NEXT: t2: i32,ch = CopyFromReg # D:1 t0, Register:i32 %8
# | -; CHECK-NEXT: t20: i32,ch = BUFFER_LOAD_UBYTE_OFFEN<Mem:(dereferenceable load (s8) from %ir.loc, addrspace 5)> TargetFrameIndex:i32<0>, Register:v4i32 $sgpr0_sgpr1_sgpr2_sgpr3, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i32<0>, TargetConstant:i1<0>, t0
# | -; CHECK-NEXT: t21: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t20, TargetConstant:i1<0>
# | -; CHECK-NEXT: t25: i32 = S_MOV_B32 TargetConstant:i32<255>
# | -; CHECK-NEXT: t26: i32 = V_AND_B32_e64 # D:1 t21, t25
# | -; CHECK-NEXT: t16: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t26
# | -; CHECK-NEXT: t33: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
# | -; CHECK-NEXT: t18: ch,glue = CopyToReg t16, Register:i32 $vgpr1, t33, t16:1
# | -; CHECK-NEXT: t19: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t18, t18:1
# | +; CHECK-NEXT: t23: i32 = COPY IMPLICIT_DEF:i32
# | +; CHECK-NEXT: t24: i32,i1 = V_ADD_CO_U32_e64 # D:1 t2, t23, TargetConstant:i1<0>
# | +; CHECK-NEXT: t28: i32 = S_MOV_B32 TargetConstant:i32<255>
# | +; CHECK-NEXT: t29: i32 = V_AND_B32_e64 # D:1 t24, t28
# | +; CHECK-NEXT: t15: ch,glue = CopyToReg # D:1 t0, Register:i32 $vgpr0, t29
# | +; CHECK-NEXT: t35: i32 = V_MOV_B32_e32 TargetConstant:i32<0>
# | +; CHECK-NEXT: t17: ch,glue = CopyToReg t15, Register:i32 $vgpr1, t35, t15:1
# | +; CHECK-NEXT: t18: ch = SI_RETURN Register:i32 $vgpr0, Register:i32 $vgpr1, t17, t17:1
# | ; CHECK-EMPTY:
# | %loc = alloca i8, addrspace(5)
# | %j = load i8, ptr addrspace(5) %loc
# `-----------------------------
# error: command failed with exit status: 1
--
```
</details>
<details>
<summary>LLVM.tools/UpdateTestChecks/update_llc_test_checks/amdgpu_generated_funcs.test</summary>
```
Exit Code: 1
Command Output (stdout):
--
# RUN: at line 4
cp -f /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll && '/usr/bin/python3' /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary /home/gha/actions-runner/_work/llvm-project/llvm-project/build/bin/llc --version=1 --include-generated-funcs /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll
# executed command: cp -f /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll
# note: command had no output on stdout or stderr
# executed command: /usr/bin/python3 /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/utils/update_llc_test_checks.py --llc-binary /home/gha/actions-runner/_work/llvm-project/llvm-project/build/bin/llc --version=1 --include-generated-funcs /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll
# .---command stderr------------
# | warning: codegen with no subarch in the target triple is deprecated and will become an error
# `-----------------------------
# RUN: at line 5
diff -u /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
# executed command: diff -u /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
# .---command stdout------------
# | --- /home/gha/actions-runner/_work/llvm-project/llvm-project/build/test/tools/UpdateTestChecks/update_llc_test_checks/Output/amdgpu_generated_funcs.test.tmp.ll
# | +++ /home/gha/actions-runner/_work/llvm-project/llvm-project/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
# | @@ -72,14 +72,52 @@
# | ; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
# | ; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
# | ; CHECK-NEXT: .cfi_undefined 2560
# | +; CHECK-NEXT: .cfi_undefined 2561
# | +; CHECK-NEXT: .cfi_undefined 2562
# | +; CHECK-NEXT: .cfi_undefined 2563
# | +; CHECK-NEXT: .cfi_undefined 2564
# | +; CHECK-NEXT: .cfi_undefined 36
# | +; CHECK-NEXT: .cfi_undefined 37
# | +; CHECK-NEXT: .cfi_undefined 38
# | +; CHECK-NEXT: .cfi_undefined 39
# | ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
# | -; CHECK-NEXT: s_mov_b32 s4, s33
# | -; CHECK-NEXT: .cfi_register 65, 36
# | +; CHECK-NEXT: s_mov_b32 s8, s33
# | +; CHECK-NEXT: .cfi_register 65, 40
# | ; CHECK-NEXT: s_mov_b32 s33, s32
# | ; CHECK-NEXT: .cfi_def_cfa_register 65
# | +; CHECK-NEXT: s_addk_i32 s32, 0x600
# | +; CHECK-NEXT: v_mov_b32_e32 v4, 0
# | +; CHECK-NEXT: v_mov_b32_e32 v0, 1
# | +; CHECK-NEXT: v_mov_b32_e32 v1, 2
# | +; CHECK-NEXT: v_mov_b32_e32 v2, 3
# | +; CHECK-NEXT: v_mov_b32_e32 v3, 4
# | +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s33
# | +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4
# | +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:8
# | +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:12
# | +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:16
# | +; CHECK-NEXT: s_mov_b64 s[4:5], 0
# | +; CHECK-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
# | +; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[6:7]
# | +; CHECK-NEXT: s_cbranch_execz .LBB0_2
# | +; CHECK-NEXT: ; %bb.1:
# | +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4
# | +; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:8
# | +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:12
# | +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:16
# | +; CHECK-NEXT: .LBB0_2: ; %Flow
# | +; CHECK-NEXT: s_andn2_saveexec_b64 s[4:5], s[4:5]
# | +; CHECK-NEXT: s_cbranch_execz .LBB0_4
# | +; CHECK-NEXT: ; %bb.3:
# | +; CHECK-NEXT: v_mov_b32_e32 v0, 1
# | +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:12
# | +; CHECK-NEXT: .LBB0_4:
# | +; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
# | ; CHECK-NEXT: v_mov_b32_e32 v0, 0
# | +; CHECK-NEXT: s_mov_b32 s32, s33
# | ; CHECK-NEXT: .cfi_def_cfa_register 64
# | -; CHECK-NEXT: s_mov_b32 s33, s4
# | +; CHECK-NEXT: s_mov_b32 s33, s8
# | +; CHECK-NEXT: s_waitcnt vmcnt(0)
# | ; CHECK-NEXT: s_setpc_b64 s[30:31]
# | ;
# | ; CHECK-LABEL: main:
# | @@ -92,6 +130,9 @@
# | ; CHECK-NEXT: .cfi_undefined 2560
# | ; CHECK-NEXT: .cfi_undefined 2561
# | ; CHECK-NEXT: .cfi_undefined 2562
# | +; CHECK-NEXT: .cfi_undefined 2563
# | +; CHECK-NEXT: .cfi_undefined 2564
# | +; CHECK-NEXT: .cfi_undefined 2565
# | ; CHECK-NEXT: .cfi_undefined 36
# | ; CHECK-NEXT: .cfi_undefined 37
# | ; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
# | @@ -99,16 +140,31 @@
# | ; CHECK-NEXT: .cfi_register 65, 38
# | ; CHECK-NEXT: s_mov_b32 s33, s32
# | ; CHECK-NEXT: .cfi_def_cfa_register 65
# | +; CHECK-NEXT: s_addk_i32 s32, 0x600
# | +; CHECK-NEXT: v_mov_b32_e32 v0, 0
# | ; CHECK-NEXT: s_getpc_b64 s[4:5]
# | ; CHECK-NEXT: s_add_u32 s4, s4, x at rel32@lo+4
# | ; CHECK-NEXT: s_addc_u32 s5, s5, x at rel32@hi+12
# | ; CHECK-NEXT: v_mov_b32_e32 v2, 1
# | +; CHECK-NEXT: v_mov_b32_e32 v3, 2
# | +; CHECK-NEXT: v_mov_b32_e32 v4, 3
# | +; CHECK-NEXT: v_mov_b32_e32 v5, 4
# | +; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33
# | +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:4
# | +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:8
# | +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:12
# | +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:16
# | ; CHECK-NEXT: v_mov_b32_e32 v0, s4
# | ; CHECK-NEXT: v_mov_b32_e32 v1, s5
# | ; CHECK-NEXT: flat_store_dword v[0:1], v2
# | ; CHECK-NEXT: ;;#ASMSTART
# | ; CHECK-NEXT: ;;#ASMEND
# | +; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:4
# | +; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:8
# | +; CHECK-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:12
# | ; CHECK-NEXT: v_mov_b32_e32 v0, 0
# | +; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:16
# | +; CHECK-NEXT: s_mov_b32 s32, s33
# | ; CHECK-NEXT: .cfi_def_cfa_register 64
# | ; CHECK-NEXT: s_mov_b32 s33, s6
# | ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
# `-----------------------------
# error: command failed with exit status: 1
--
```
</details>
If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.
https://github.com/llvm/llvm-project/pull/221870
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