[llvm] [LV] Add support for widening loads/stores to a VF multiple (PR #217670)

[Jack Styles via llvm-commits]

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@@ -5834,6 +5834,37 @@ bool AArch64TTIImpl::isLegalMaskedExpandLoad(Type *DataTy,
          (ST->isSVEorStreamingSVEAvailable() && ST->hasSME2p2());
 }
 
+unsigned
+AArch64TTIImpl::getPreferredVFMultipleForMemoryOp(unsigned Opcode, Type *DataTy,
+                                                  ElementCount VF, unsigned UF,
+                                                  bool IsMasked) const {
+  assert((Opcode == Instruction::Load || Opcode == Instruction::Store) &&
+         "expected load/store opcode");
+  if (IsMasked)
+    return 1; // TODO: Support masked multi-vector loads/stores.
+
+  if (!ST->enableSubRegLiveness())
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Stylie777 wrote:

Makes sense, thanks!

https://github.com/llvm/llvm-project/pull/217670