[llvm] [AArch64] Reorder ZPR stack spills to maximize ld1b/st1b pairings (PR #218950)

[Kieran B via llvm-commits]

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@@ -2829,6 +2917,11 @@ bool AArch64FrameLowering::assignCalleeSavedSpillSlots(
       CSI.push_back(VGInfo);
   }
 
+  if (!IsWindows)
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kieroxide wrote:

I don't think we should add tests for this in this PR as it currently crashes. I will create a github issue for it. 

https://github.com/llvm/llvm-project/pull/218950