[llvm] 2cb4f83 - [AMDGPU][NFC] Add gfx13 MC tests for v_mov_b16 and v_swap_b16 (#220863)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 7 00:34:14 PDT 2026
Author: Mariusz Sikora
Date: 2026-09-07T09:34:09+02:00
New Revision: 2cb4f837f087d7ed38aad292b5037cabcb2fcd4c
URL: https://github.com/llvm/llvm-project/commit/2cb4f837f087d7ed38aad292b5037cabcb2fcd4c
DIFF: https://github.com/llvm/llvm-project/commit/2cb4f837f087d7ed38aad292b5037cabcb2fcd4c.diff
LOG: [AMDGPU][NFC] Add gfx13 MC tests for v_mov_b16 and v_swap_b16 (#220863)
Both instructions were already supported on gfx13 but had limited MC
tests coverage.
Added:
Modified:
llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
Removed:
################################################################################
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop1.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
index 540151b70ebfc..0cc6fd15adb45 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop1.s
@@ -2831,6 +2831,60 @@ v_log_f32 v5, src_scc
v_log_f32 v255, 0xaf123456
// GFX13: v_log_f32_e32 v255, 0xaf123456 ; encoding: [0xff,0x4e,0xfe,0x7f,0x56,0x34,0x12,0xaf]
+v_mov_b16 v5.l, v1.l
+// GFX13: v_mov_b16_e32 v5.l, v1.l ; encoding: [0x01,0x39,0x0a,0x7e]
+
+v_mov_b16 v5.l, v127.l
+// GFX13: v_mov_b16_e32 v5.l, v127.l ; encoding: [0x7f,0x39,0x0a,0x7e]
+
+v_mov_b16 v5.l, s1
+// GFX13: v_mov_b16_e32 v5.l, s1 ; encoding: [0x01,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, s105
+// GFX13: v_mov_b16_e32 v5.l, s105 ; encoding: [0x69,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, vcc_lo
+// GFX13: v_mov_b16_e32 v5.l, vcc_lo ; encoding: [0x6a,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, vcc_hi
+// GFX13: v_mov_b16_e32 v5.l, vcc_hi ; encoding: [0x6b,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, ttmp15
+// GFX13: v_mov_b16_e32 v5.l, ttmp15 ; encoding: [0x7b,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, m0
+// GFX13: v_mov_b16_e32 v5.l, m0 ; encoding: [0x7d,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, exec_lo
+// GFX13: v_mov_b16_e32 v5.l, exec_lo ; encoding: [0x7e,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, exec_hi
+// GFX13: v_mov_b16_e32 v5.l, exec_hi ; encoding: [0x7f,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, null
+// GFX13: v_mov_b16_e32 v5.l, null ; encoding: [0x7c,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, -1
+// GFX13: v_mov_b16_e32 v5.l, -1 ; encoding: [0xc1,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, 0.5
+// GFX13: v_mov_b16_e32 v5.l, 0.5 ; encoding: [0xf0,0x38,0x0a,0x7e]
+
+v_mov_b16 v5.l, src_scc
+// GFX13: v_mov_b16_e32 v5.l, src_scc ; encoding: [0xfd,0x38,0x0a,0x7e]
+
+v_mov_b16 v127.l, 0xfe0b
+// GFX13: v_mov_b16_e32 v127.l, 0xfe0b ; encoding: [0xff,0x38,0xfe,0x7e,0x0b,0xfe,0x00,0x00]
+
+v_mov_b16 v5.h, v1.h
+// GFX13: v_mov_b16_e32 v5.h, v1.h ; encoding: [0x81,0x39,0x0a,0x7f]
+
+v_mov_b16 v5.l, v1.h
+// GFX13: v_mov_b16_e32 v5.l, v1.h ; encoding: [0x81,0x39,0x0a,0x7e]
+
+v_mov_b16 v5.h, s1
+// GFX13: v_mov_b16_e32 v5.h, s1 ; encoding: [0x01,0x38,0x0a,0x7f]
+
v_mov_b32 v5, v1
// GFX13: v_mov_b32_e32 v5, v1 ; encoding: [0x01,0x03,0x0a,0x7e]
@@ -3983,6 +4037,18 @@ v_sqrt_f64 v[254:255], 0xaf123456
v_sqrt_f64 v[254:255], 0x10abcdef12345678
// GFX13: v_sqrt_f64_e32 v[254:255], 0x10abcdef12345678 ; encoding: [0xfe,0x68,0xfc,0x7f,0x78,0x56,0x34,0x12,0xef,0xcd,0xab,0x10]
+v_swap_b16 v5.l, v1.l
+// GFX13: v_swap_b16 v5.l, v1.l ; encoding: [0x01,0xcd,0x0a,0x7e]
+
+v_swap_b16 v5.l, v1.h
+// GFX13: v_swap_b16 v5.l, v1.h ; encoding: [0x81,0xcd,0x0a,0x7e]
+
+v_swap_b16 v5.h, v1.l
+// GFX13: v_swap_b16 v5.h, v1.l ; encoding: [0x01,0xcd,0x0a,0x7f]
+
+v_swap_b16 v127.l, v127.l
+// GFX13: v_swap_b16 v127.l, v127.l ; encoding: [0x7f,0xcd,0xfe,0x7e]
+
v_swap_b32 v5, v1
// GFX13: v_swap_b32 v5, v1 ; encoding: [0x01,0xcb,0x0a,0x7e]
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
index 25a5935474693..425221414a7a7 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp16.s
@@ -2198,6 +2198,48 @@ v_log_f32 v5, v1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
v_log_f32 v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
// GFX13: v_log_f32_dpp v255, -|v255| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x4e,0xfe,0x7f,0xff,0x6f,0x35,0x30]
+v_mov_b16 v5.l, v1.l quad_perm:[3,2,1,0]
+// GFX13: v_mov_b16_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x1b,0x00,0xff]
+
+v_mov_b16 v5.l, v1.l quad_perm:[0,1,2,3]
+// GFX13: v_mov_b16_dpp v5.l, v1.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0xff]
+
+v_mov_b16 v5.l, v1.l row_mirror
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x40,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_half_mirror
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x41,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_shl:1
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x01,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_shl:15
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x0f,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_shr:1
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x11,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_shr:15
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x1f,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_ror:1
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x21,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_ror:15
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x2f,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x50,0x01,0xff]
+
+v_mov_b16 v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x5f,0x01,0x01]
+
+v_mov_b16 v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// GFX13: v_mov_b16_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x38,0x0a,0x7e,0x01,0x60,0x09,0x13]
+
+v_mov_b16 v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX13: v_mov_b16_dpp v127.l, v127.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0x38,0xfe,0x7e,0x7f,0x6f,0x05,0x30]
+
v_mov_b32 v5, v1 quad_perm:[3,2,1,0]
// GFX13: v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
index bcbbd27d2aaf3..f4a5753fd3b86 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop1_dpp8.s
@@ -515,6 +515,15 @@ v_log_f32 v5, v1 dpp8:[7,6,5,4,3,2,1,0] fi:1
v_log_f32 v255, v255 dpp8:[0,0,0,0,0,0,0,0] fi:0
// GFX13: v_log_f32_dpp v255, v255 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0x4e,0xfe,0x7f,0xff,0x00,0x00,0x00]
+v_mov_b16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX13: v_mov_b16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x38,0x0a,0x7e,0x01,0x77,0x39,0x05]
+
+v_mov_b16 v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// GFX13: v_mov_b16_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0xea,0x38,0x0a,0x7e,0x01,0x77,0x39,0x05]
+
+v_mov_b16 v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] fi:0
+// GFX13: v_mov_b16_dpp v127.l, v127.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xe9,0x38,0xfe,0x7e,0x7f,0x00,0x00,0x00]
+
v_mov_b32 v5, v1 dpp8:[7,6,5,4,3,2,1,0]
// GFX13: v_mov_b32_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0xe9,0x02,0x0a,0x7e,0x01,0x77,0x39,0x05]
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
index 07fa155d33265..fa113d853139e 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1.s
@@ -2876,6 +2876,60 @@ v_log_f32_e64 v5, src_scc mul:4
v_log_f32_e64 v255, -|0xaf123456| clamp div:2
// GFX13: v_log_f32_e64 v255, -|0xaf123456| clamp div:2 ; encoding: [0xff,0x81,0xa7,0xd5,0xff,0x00,0x01,0x3a,0x56,0x34,0x12,0xaf]
+v_mov_b16_e64 v5.l, v1.l
+// GFX13: v_mov_b16_e64 v5.l, v1.l ; encoding: [0x05,0x00,0x9c,0xd5,0x01,0x01,0x01,0x02]
+
+v_mov_b16_e64 v5.l, v255.l
+// GFX13: v_mov_b16_e64 v5.l, v255.l ; encoding: [0x05,0x00,0x9c,0xd5,0xff,0x01,0x01,0x02]
+
+v_mov_b16_e64 v5.l, s1
+// GFX13: v_mov_b16_e64 v5.l, s1 ; encoding: [0x05,0x00,0x9c,0xd5,0x01,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, s105
+// GFX13: v_mov_b16_e64 v5.l, s105 ; encoding: [0x05,0x00,0x9c,0xd5,0x69,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, vcc_lo
+// GFX13: v_mov_b16_e64 v5.l, vcc_lo ; encoding: [0x05,0x00,0x9c,0xd5,0x6a,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, vcc_hi
+// GFX13: v_mov_b16_e64 v5.l, vcc_hi ; encoding: [0x05,0x00,0x9c,0xd5,0x6b,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, ttmp15
+// GFX13: v_mov_b16_e64 v5.l, ttmp15 ; encoding: [0x05,0x00,0x9c,0xd5,0x7b,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, m0
+// GFX13: v_mov_b16_e64 v5.l, m0 ; encoding: [0x05,0x00,0x9c,0xd5,0x7d,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, exec_lo
+// GFX13: v_mov_b16_e64 v5.l, exec_lo ; encoding: [0x05,0x00,0x9c,0xd5,0x7e,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, exec_hi
+// GFX13: v_mov_b16_e64 v5.l, exec_hi ; encoding: [0x05,0x00,0x9c,0xd5,0x7f,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, null
+// GFX13: v_mov_b16_e64 v5.l, null ; encoding: [0x05,0x00,0x9c,0xd5,0x7c,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, -1
+// GFX13: v_mov_b16_e64 v5.l, -1 ; encoding: [0x05,0x00,0x9c,0xd5,0xc1,0x00,0x01,0x02]
+
+v_mov_b16_e64 v5.l, 0x3800
+// GFX13: v_mov_b16_e64 v5.l, 0x3800 ; encoding: [0x05,0x00,0x9c,0xd5,0xff,0x00,0x01,0x02,0x00,0x38,0x00,0x00]
+
+v_mov_b16_e64 v5.l, src_scc
+// GFX13: v_mov_b16_e64 v5.l, src_scc ; encoding: [0x05,0x00,0x9c,0xd5,0xfd,0x00,0x01,0x02]
+
+v_mov_b16_e64 v255.l, 0xfe0b
+// GFX13: v_mov_b16_e64 v255.l, 0xfe0b ; encoding: [0xff,0x00,0x9c,0xd5,0xff,0x00,0x01,0x02,0x0b,0xfe,0x00,0x00]
+
+v_mov_b16_e64 v5.h, v1.h
+// GFX13: v_mov_b16_e64 v5.h, v1.h op_sel:[1,1] ; encoding: [0x05,0x48,0x9c,0xd5,0x01,0x01,0x01,0x02]
+
+v_mov_b16_e64 v5.l, v1.h
+// GFX13: v_mov_b16_e64 v5.l, v1.h op_sel:[1,0] ; encoding: [0x05,0x08,0x9c,0xd5,0x01,0x01,0x01,0x02]
+
+v_mov_b16_e64 v5.h, s1
+// GFX13: v_mov_b16_e64 v5.h, s1 op_sel:[0,1] ; encoding: [0x05,0x40,0x9c,0xd5,0x01,0x00,0x01,0x02]
+
v_mov_b32_e64 v5, v1
// GFX13: v_mov_b32_e64 v5, v1 ; encoding: [0x05,0x00,0x81,0xd5,0x01,0x01,0x01,0x02]
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
index 89070429dd5e8..fa9b09d081e20 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp16.s
@@ -2165,6 +2165,48 @@ v_log_f32_e64_dpp v5, v1 mul:4 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl
v_log_f32_e64_dpp v255, -|v255| clamp div:2 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
// GFX13: v_log_f32_e64_dpp v255, -|v255| clamp div:2 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xff,0x81,0xa7,0xd5,0xfa,0x00,0x00,0x38,0xff,0x6f,0x05,0x30]
+v_mov_b16_e64_dpp v5.l, v1.l quad_perm:[3,2,1,0]
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l quad_perm:[0,1,2,3]
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0xe4,0x00,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_mirror
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x40,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_half_mirror
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x41,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_shl:1
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x01,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_shl:15
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x0f,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_shr:1
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x11,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_shr:15
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1f,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_ror:1
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x21,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_ror:15
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x2f,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x50,0x01,0xff]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x5f,0x01,0x01]
+
+v_mov_b16_e64_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0x05,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0x01,0x60,0x09,0x13]
+
+v_mov_b16_e64_dpp v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX13: v_mov_b16_e64_dpp v255.l, v255.l row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xff,0x00,0x9c,0xd5,0xfa,0x00,0x00,0x00,0xff,0x6f,0x05,0x30]
+
v_mov_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0]
// GFX13: v_mov_b32_e64_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x81,0xd5,0xfa,0x00,0x00,0x00,0x01,0x1b,0x00,0xff]
diff --git a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
index 6d17be29804c9..1ce8638b72cb6 100644
--- a/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
+++ b/llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_dpp8.s
@@ -605,6 +605,15 @@ v_log_f32_e64_dpp v5, v1 mul:4 dpp8:[7,6,5,4,3,2,1,0] fi:1
v_log_f32_e64_dpp v255, -|v255| clamp div:2 dpp8:[0,0,0,0,0,0,0,0] fi:0
// GFX13: v_log_f32_e64_dpp v255, -|v255| clamp div:2 dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xff,0x81,0xa7,0xd5,0xe9,0x00,0x00,0x38,0xff,0x00,0x00,0x00]
+v_mov_b16_e64_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0]
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x9c,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
+
+v_mov_b16_e64_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1
+// GFX13: v_mov_b16_e64_dpp v5.l, v1.l dpp8:[7,6,5,4,3,2,1,0] fi:1 ; encoding: [0x05,0x00,0x9c,0xd5,0xea,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
+
+v_mov_b16_e64_dpp v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0]
+// GFX13: v_mov_b16_e64_dpp v255.l, v255.l dpp8:[0,0,0,0,0,0,0,0] ; encoding: [0xff,0x00,0x9c,0xd5,0xe9,0x00,0x00,0x00,0xff,0x00,0x00,0x00]
+
v_mov_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0]
// GFX13: v_mov_b32_e64_dpp v5, v1 dpp8:[7,6,5,4,3,2,1,0] ; encoding: [0x05,0x00,0x81,0xd5,0xe9,0x00,0x00,0x00,0x01,0x77,0x39,0x05]
More information about the llvm-commits
mailing list