[llvm] [TTI/RISCV] Strip getMaxVScale (PR #220547)
Ramkumar Ramachandra via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 4 01:47:08 PDT 2026
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@@ -60,7 +60,7 @@ exit:
ret i64 %res
}
-attributes #0 = { "target-features"="+64bit,+v,+zvl128b,+zvl256b" }
+attributes #0 = { "target-features"="+64bit,+v,+zvl128b,+zvl256b" vscale_range(4, 1024) }
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artagnon wrote:
That would be an "unrelated change" in a similar vein as the fminimumnum FIXME change, no?
https://github.com/llvm/llvm-project/pull/220547
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