[llvm] [SLP][NFC] Cleanup LIT test labels for RISCV (PR #220965)
Ryan Buchner via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 3 08:04:10 PDT 2026
https://github.com/bababuck created https://github.com/llvm/llvm-project/pull/220965
None
>From 477096ed30eac1d76fb596d60d4e408185df5f70 Mon Sep 17 00:00:00 2001
From: bababuck <buchner.ryan at gmail.com>
Date: Wed, 2 Sep 2026 18:11:37 -0700
Subject: [PATCH] [SLP][NFC] Cleanup LIT test labels for RISCV
---
.../SLPVectorizer/RISCV/floating-point.ll | 66 +--
.../SLPVectorizer/RISCV/fminimumnum.ll | 93 +---
.../SLPVectorizer/RISCV/load-binop-store.ll | 82 +---
.../SLPVectorizer/RISCV/load-store.ll | 94 +---
.../SLPVectorizer/RISCV/math-function.ll | 449 +-----------------
.../SLPVectorizer/RISCV/splat-gather-trim.ll | 74 +--
6 files changed, 30 insertions(+), 828 deletions(-)
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
index da8cd38e3108d..6c8f6e8400b2a 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/floating-point.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \
; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 \
-; RUN: | FileCheck %s
+; RUN: | FileCheck %s --check-prefixes=CHECK,MAXVF0
; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \
-; RUN: | FileCheck %s --check-prefix=DEFAULT
+; RUN: | FileCheck %s --check-prefixes=CHECK,DEFAULT
define void @fp_add(ptr %dst, ptr %p, ptr %q) {
; CHECK-LABEL: define void @fp_add
@@ -15,15 +15,6 @@ define void @fp_add(ptr %dst, ptr %p, ptr %q) {
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_add
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0:[0-9]+]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = fadd <4 x float> [[TMP0]], [[TMP1]]
-; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -66,14 +57,6 @@ define void @fp_sub(ptr %dst, ptr %p) {
; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_sub
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = fsub <4 x float> [[TMP0]], splat (float 3.000000e+00)
-; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -109,15 +92,6 @@ define void @fp_mul(ptr %dst, ptr %p, ptr %q) {
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_mul
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = fmul <4 x float> [[TMP0]], [[TMP1]]
-; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -160,14 +134,6 @@ define void @fp_div(ptr %dst, ptr %p) {
; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_div
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = fdiv <4 x float> [[TMP0]], splat (float 1.050000e+01)
-; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -205,15 +171,6 @@ define void @fp_max(ptr %dst, ptr %p, ptr %q) {
; CHECK-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_max
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[Q]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.maxnum.v4f32(<4 x float> [[TMP0]], <4 x float> [[TMP1]])
-; DEFAULT-NEXT: store <4 x float> [[TMP2]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -258,14 +215,6 @@ define void @fp_min(ptr %dst, ptr %p) {
; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_min
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = call <4 x float> @llvm.minnum.v4f32(<4 x float> [[TMP0]], <4 x float> splat (float 1.250000e+00))
-; DEFAULT-NEXT: store <4 x float> [[TMP1]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -302,14 +251,6 @@ define void @fp_convert(ptr %dst, ptr %p) {
; CHECK-NEXT: store <4 x i32> [[TMP1]], ptr [[DST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: define void @fp_convert
-; DEFAULT-SAME: (ptr [[DST:%.*]], ptr [[P:%.*]]) #[[ATTR0]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[TMP0]])
-; DEFAULT-NEXT: store <4 x i32> [[TMP1]], ptr [[DST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load float, ptr %p, align 4
%pe1 = getelementptr inbounds float, ptr %p, i64 1
@@ -334,3 +275,6 @@ entry:
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DEFAULT: {{.*}}
+; MAXVF0: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/fminimumnum.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/fminimumnum.ll
index 4d43f3f3e55f0..68d362c7b6d81 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/fminimumnum.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/fminimumnum.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt --passes=slp-vectorizer --mtriple=riscv64 -mattr="+v,+zvfh" -S < %s | FileCheck %s
-; RUN: opt --passes=slp-vectorizer --mtriple=riscv64 -mattr="+v,+zvfhmin" -S < %s | FileCheck %s --check-prefix=ZVFHMIN
+; RUN: opt --passes=slp-vectorizer --mtriple=riscv64 -mattr="+v,+zvfh" -S < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
+; RUN: opt --passes=slp-vectorizer --mtriple=riscv64 -mattr="+v,+zvfhmin" -S < %s | FileCheck %s --check-prefixes=CHECK,ZVFHMIN
@input1_f32 = global [9 x float] zeroinitializer, align 16
@input2_f32 = global [9 x float] zeroinitializer, align 16
@@ -26,19 +26,6 @@ define void @fmin32() {
; CHECK-NEXT: store float [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f32, i64 32), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmin32(
-; ZVFHMIN-SAME: ) #[[ATTR0:[0-9]+]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <8 x float>, ptr @input1_f32, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @input2_f32, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <8 x float> @llvm.minimumnum.v8f32(<8 x float> [[TMP0]], <8 x float> [[TMP1]])
-; ZVFHMIN-NEXT: store <8 x float> [[TMP2]], ptr @output_f32, align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load float, ptr getelementptr inbounds nuw (i8, ptr @input1_f32, i64 32), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load float, ptr getelementptr inbounds nuw (i8, ptr @input2_f32, i64 32), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call float @llvm.minimumnum.f32(float [[INPUT8_1]], float [[INPUT8_2]])
-; ZVFHMIN-NEXT: store float [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f32, i64 32), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load float, ptr @input1_f32, align 16
%input0_1 = load float, ptr @input2_f32, align 16
@@ -95,19 +82,6 @@ define void @fmax32() {
; CHECK-NEXT: store float [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f32, i64 32), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmax32(
-; ZVFHMIN-SAME: ) #[[ATTR0]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <8 x float>, ptr @input1_f32, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr @input2_f32, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <8 x float> @llvm.maximumnum.v8f32(<8 x float> [[TMP0]], <8 x float> [[TMP1]])
-; ZVFHMIN-NEXT: store <8 x float> [[TMP2]], ptr @output_f32, align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load float, ptr getelementptr inbounds nuw (i8, ptr @input1_f32, i64 32), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load float, ptr getelementptr inbounds nuw (i8, ptr @input2_f32, i64 32), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call float @llvm.maximumnum.f32(float [[INPUT8_1]], float [[INPUT8_2]])
-; ZVFHMIN-NEXT: store float [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f32, i64 32), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load float, ptr @input1_f32, align 16
%input0_1 = load float, ptr @input2_f32, align 16
@@ -168,23 +142,6 @@ define void @fmin64() {
; CHECK-NEXT: store double [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 64), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmin64(
-; ZVFHMIN-SAME: ) #[[ATTR0]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr @input1_f64, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <4 x double>, ptr @input2_f64, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> [[TMP0]], <4 x double> [[TMP1]])
-; ZVFHMIN-NEXT: store <4 x double> [[TMP2]], ptr @output_f64, align 16
-; ZVFHMIN-NEXT: [[TMP3:%.*]] = load <4 x double>, ptr getelementptr inbounds nuw (i8, ptr @input1_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[TMP4:%.*]] = load <4 x double>, ptr getelementptr inbounds nuw (i8, ptr @input2_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[TMP5:%.*]] = call <4 x double> @llvm.minimumnum.v4f64(<4 x double> [[TMP3]], <4 x double> [[TMP4]])
-; ZVFHMIN-NEXT: store <4 x double> [[TMP5]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load double, ptr getelementptr inbounds nuw (i8, ptr @input1_f64, i64 64), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load double, ptr getelementptr inbounds nuw (i8, ptr @input2_f64, i64 64), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call double @llvm.minimumnum.f64(double [[INPUT8_1]], double [[INPUT8_2]])
-; ZVFHMIN-NEXT: store double [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 64), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load double, ptr @input1_f64, align 16
%input0_1 = load double, ptr @input2_f64, align 16
@@ -245,23 +202,6 @@ define void @fmax64() {
; CHECK-NEXT: store double [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 64), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmax64(
-; ZVFHMIN-SAME: ) #[[ATTR0]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <4 x double>, ptr @input1_f64, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <4 x double>, ptr @input2_f64, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> [[TMP0]], <4 x double> [[TMP1]])
-; ZVFHMIN-NEXT: store <4 x double> [[TMP2]], ptr @output_f64, align 16
-; ZVFHMIN-NEXT: [[TMP3:%.*]] = load <4 x double>, ptr getelementptr inbounds nuw (i8, ptr @input1_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[TMP4:%.*]] = load <4 x double>, ptr getelementptr inbounds nuw (i8, ptr @input2_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[TMP5:%.*]] = call <4 x double> @llvm.maximumnum.v4f64(<4 x double> [[TMP3]], <4 x double> [[TMP4]])
-; ZVFHMIN-NEXT: store <4 x double> [[TMP5]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 32), align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load double, ptr getelementptr inbounds nuw (i8, ptr @input1_f64, i64 64), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load double, ptr getelementptr inbounds nuw (i8, ptr @input2_f64, i64 64), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call double @llvm.maximumnum.f64(double [[INPUT8_1]], double [[INPUT8_2]])
-; ZVFHMIN-NEXT: store double [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f64, i64 64), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load double, ptr @input1_f64, align 16
%input0_1 = load double, ptr @input2_f64, align 16
@@ -318,19 +258,6 @@ define void @fmin16() {
; CHECK-NEXT: store half [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f16, i64 16), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmin16(
-; ZVFHMIN-SAME: ) #[[ATTR0]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <8 x half>, ptr @input1_f16, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <8 x half>, ptr @input2_f16, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.minimumnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
-; ZVFHMIN-NEXT: store <8 x half> [[TMP2]], ptr @output_f16, align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load half, ptr getelementptr inbounds nuw (i8, ptr @input1_f16, i64 16), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load half, ptr getelementptr inbounds nuw (i8, ptr @input2_f16, i64 16), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call half @llvm.minimumnum.f16(half [[INPUT8_1]], half [[INPUT8_2]])
-; ZVFHMIN-NEXT: store half [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f16, i64 16), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load half, ptr @input1_f16, align 16
%input0_1 = load half, ptr @input2_f16, align 16
@@ -387,19 +314,6 @@ define void @fmax16() {
; CHECK-NEXT: store half [[TMP26]], ptr getelementptr inbounds nuw (i8, ptr @output_f16, i64 16), align 16
; CHECK-NEXT: ret void
;
-; ZVFHMIN-LABEL: define void @fmax16(
-; ZVFHMIN-SAME: ) #[[ATTR0]] {
-; ZVFHMIN-NEXT: [[ENTRY:.*:]]
-; ZVFHMIN-NEXT: [[TMP0:%.*]] = load <8 x half>, ptr @input1_f16, align 16
-; ZVFHMIN-NEXT: [[TMP1:%.*]] = load <8 x half>, ptr @input2_f16, align 16
-; ZVFHMIN-NEXT: [[TMP2:%.*]] = call <8 x half> @llvm.maximumnum.v8f16(<8 x half> [[TMP0]], <8 x half> [[TMP1]])
-; ZVFHMIN-NEXT: store <8 x half> [[TMP2]], ptr @output_f16, align 16
-; ZVFHMIN-NEXT: [[INPUT8_1:%.*]] = load half, ptr getelementptr inbounds nuw (i8, ptr @input1_f16, i64 16), align 16
-; ZVFHMIN-NEXT: [[INPUT8_2:%.*]] = load half, ptr getelementptr inbounds nuw (i8, ptr @input2_f16, i64 16), align 16
-; ZVFHMIN-NEXT: [[OUTPUT8:%.*]] = tail call half @llvm.maximumnum.f16(half [[INPUT8_1]], half [[INPUT8_2]])
-; ZVFHMIN-NEXT: store half [[OUTPUT8]], ptr getelementptr inbounds nuw (i8, ptr @output_f16, i64 16), align 16
-; ZVFHMIN-NEXT: ret void
-;
entry:
%input0_0 = load half, ptr @input1_f16, align 16
%input0_1 = load half, ptr @input2_f16, align 16
@@ -441,3 +355,6 @@ entry:
}
declare half @llvm.maximumnum.f16(half, half)
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; ZVFH: {{.*}}
+; ZVFHMIN: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
index a07a5cd9f900a..707419e693b2c 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/load-binop-store.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+m,+v \
-; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 -S | FileCheck %s
-; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+m,+v -S | FileCheck %s --check-prefixes=DEFAULT
+; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 -S | FileCheck %s --check-prefixes=CHECK,MAXVFZERO
+; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+m,+v -S | FileCheck %s --check-prefixes=CHECK,DEFAULT
define void @vec_add(ptr %dest, ptr %p) {
; CHECK-LABEL: @vec_add(
@@ -11,13 +11,6 @@ define void @vec_add(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_add(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = add <2 x i16> [[TMP0]], splat (i16 1)
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -40,13 +33,6 @@ define void @vec_sub(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_sub(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = sub <2 x i16> [[TMP0]], splat (i16 17)
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -69,13 +55,6 @@ define void @vec_rsub(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_rsub(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = sub <2 x i16> splat (i16 29), [[TMP0]]
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -98,13 +77,6 @@ define void @vec_mul(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_mul(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = mul <2 x i16> [[TMP0]], splat (i16 7)
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -127,13 +99,6 @@ define void @vec_sdiv(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_sdiv(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = sdiv <2 x i16> [[TMP0]], splat (i16 7)
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -157,14 +122,6 @@ define void @vec_and(ptr %dest, ptr %p, ptr %q) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_and(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = and <2 x i16> [[TMP0]], [[TMP1]]
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -192,14 +149,6 @@ define void @vec_or(ptr %dest, ptr %p, ptr %q) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_or(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = or <2 x i16> [[TMP0]], [[TMP1]]
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -227,14 +176,6 @@ define void @vec_sll(ptr %dest, ptr %p, ptr %q) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_sll(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = shl <2 x i16> [[TMP0]], [[TMP1]]
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -263,14 +204,6 @@ define void @vec_smin(ptr %dest, ptr %p, ptr %q) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_smin(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.smin.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -299,14 +232,6 @@ define void @vec_umax(ptr %dest, ptr %p, ptr %q) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_umax(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr [[Q:%.*]], align 4
-; DEFAULT-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.umax.v2i16(<2 x i16> [[TMP0]], <2 x i16> [[TMP1]])
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -324,3 +249,6 @@ entry:
store i16 %a1, ptr %inc2, align 2
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DEFAULT: {{.*}}
+; MAXVFZERO: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
index 0a40632c3e4f9..af86b51a32834 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v \
-; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 -S | FileCheck %s
-; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefixes=DEFAULT
+; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 -S | FileCheck %s --check-prefixes=CHECK,MAXVFZERO
+; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v -S | FileCheck %s --check-prefixes=CHECK,DEFAULT
define void @simple_copy(ptr %dest, ptr %p) {
@@ -11,12 +11,6 @@ define void @simple_copy(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP0]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @simple_copy(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: store <2 x i16> [[TMP0]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -36,13 +30,6 @@ define void @vec_add(ptr %dest, ptr %p) {
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @vec_add(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <2 x i16>, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = add <2 x i16> [[TMP0]], splat (i16 1)
-; DEFAULT-NEXT: store <2 x i16> [[TMP1]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -67,14 +54,6 @@ define void @splat_store_i16(ptr %dest, ptr %p) {
; CHECK-NEXT: store i16 [[E0]], ptr [[INC2]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i16(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[E0:%.*]] = load i16, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: store i16 [[E0]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i16, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i16 [[E0]], ptr [[INC2]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
@@ -93,14 +72,6 @@ define void @splat_store_i64(ptr %dest, ptr %p) {
; CHECK-NEXT: store i64 [[E0]], ptr [[INC2]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i64(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[E0:%.*]] = load i64, ptr [[P:%.*]], align 4
-; DEFAULT-NEXT: store i64 [[E0]], ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i64, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i64 [[E0]], ptr [[INC2]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i64, ptr %p, align 4
@@ -118,13 +89,6 @@ define void @splat_store_i64_zero(ptr %dest) {
; CHECK-NEXT: store i64 0, ptr [[INC2]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i64_zero(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store i64 0, ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i64, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i64 0, ptr [[INC2]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
store i64 0, ptr %dest, align 4
%inc2 = getelementptr inbounds i64, ptr %dest, i64 1
@@ -140,13 +104,6 @@ define void @splat_store_i64_one(ptr %dest) {
; CHECK-NEXT: store i64 1, ptr [[INC2]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i64_one(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store i64 1, ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i64, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i64 1, ptr [[INC2]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
store i64 1, ptr %dest, align 4
%inc2 = getelementptr inbounds i64, ptr %dest, i64 1
@@ -160,11 +117,6 @@ define void @splat_store_i32_zero(ptr %dest) {
; CHECK-NEXT: store <4 x i32> zeroinitializer, ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i32_zero(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store <4 x i32> zeroinitializer, ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
store i32 0, ptr %dest, align 4
%inc1 = getelementptr inbounds i32, ptr %dest, i64 1
@@ -182,11 +134,6 @@ define void @splat_store_i32_one(ptr %dest) {
; CHECK-NEXT: store <4 x i32> splat (i32 1), ptr [[DEST:%.*]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @splat_store_i32_one(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store <4 x i32> splat (i32 1), ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
store i32 1, ptr %dest, align 4
%inc1 = getelementptr inbounds i32, ptr %dest, i64 1
@@ -210,17 +157,6 @@ define void @store_stepvector_i32(ptr %dest) {
; CHECK-NEXT: store i32 3, ptr [[INC3]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @store_stepvector_i32(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store i32 0, ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC1:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i32 1, ptr [[INC1]], align 2
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 2
-; DEFAULT-NEXT: store i32 2, ptr [[INC2]], align 2
-; DEFAULT-NEXT: [[INC3:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 3
-; DEFAULT-NEXT: store i32 3, ptr [[INC3]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
store i32 0, ptr %dest, align 4
%inc1 = getelementptr inbounds i32, ptr %dest, i64 1
@@ -244,17 +180,6 @@ define void @store_arbitrary_constant_i32(ptr %dest) {
; CHECK-NEXT: store i32 77, ptr [[INC3]], align 2
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @store_arbitrary_constant_i32(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: store i32 0, ptr [[DEST:%.*]], align 4
-; DEFAULT-NEXT: [[INC1:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 1
-; DEFAULT-NEXT: store i32 -33, ptr [[INC1]], align 2
-; DEFAULT-NEXT: [[INC2:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 2
-; DEFAULT-NEXT: store i32 44, ptr [[INC2]], align 2
-; DEFAULT-NEXT: [[INC3:%.*]] = getelementptr inbounds i32, ptr [[DEST]], i64 3
-; DEFAULT-NEXT: store i32 77, ptr [[INC3]], align 2
-; DEFAULT-NEXT: ret void
-;
entry:
store i32 0, ptr %dest, align 4
%inc1 = getelementptr inbounds i32, ptr %dest, i64 1
@@ -279,18 +204,6 @@ define void @shared-chain-ordering(ptr %dest, ptr %p, i64 %offset) {
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST]], align 4
; CHECK-NEXT: ret void
;
-; DEFAULT-LABEL: @shared-chain-ordering(
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[INC:%.*]] = getelementptr inbounds i16, ptr [[P:%.*]], i64 1
-; DEFAULT-NEXT: [[INCS0:%.*]] = getelementptr inbounds i16, ptr [[DEST:%.*]], i64 [[OFFSET:%.*]]
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[P]], align 4
-; DEFAULT-NEXT: [[E1:%.*]] = load i16, ptr [[INC]], align 2
-; DEFAULT-NEXT: store <4 x i16> [[TMP0]], ptr [[INCS0]], align 4
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> poison, <2 x i32> <i32 0, i32 poison>
-; DEFAULT-NEXT: [[TMP2:%.*]] = insertelement <2 x i16> [[TMP1]], i16 [[E1]], i64 1
-; DEFAULT-NEXT: store <2 x i16> [[TMP2]], ptr [[DEST]], align 4
-; DEFAULT-NEXT: ret void
-;
entry:
%e0 = load i16, ptr %p, align 4
%inc = getelementptr inbounds i16, ptr %p, i64 1
@@ -315,3 +228,6 @@ entry:
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DEFAULT: {{.*}}
+; MAXVFZERO: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
index b68db4d88aa3b..ea9d58bc862ff 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \
; RUN: -riscv-v-vector-bits-min=-1 -riscv-v-slp-max-vf=0 \
-; RUN: | FileCheck %s
+; RUN: | FileCheck %s --check-prefixes=CHECK,MAXVF0
; RUN: opt < %s -passes=slp-vectorizer -S -mtriple=riscv64 -mattr=+v,+f \
-; RUN: | FileCheck %s --check-prefix=DEFAULT
+; RUN: | FileCheck %s --check-prefixes=CHECK,DEFAULT
declare float @fabsf(float) readonly nounwind willreturn
@@ -15,13 +15,6 @@ define <4 x float> @fabs_4x(ptr %a) {
; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]])
; CHECK-NEXT: ret <4 x float> [[TMP1]]
;
-; DEFAULT-LABEL: define <4 x float> @fabs_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1:[0-9]+]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]])
-; DEFAULT-NEXT: ret <4 x float> [[TMP1]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -49,13 +42,6 @@ define <4 x float> @int_fabs_4x(ptr %a) {
; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]])
; CHECK-NEXT: ret <4 x float> [[TMP1]]
;
-; DEFAULT-LABEL: define <4 x float> @int_fabs_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.fabs.v4f32(<4 x float> [[TMP0]])
-; DEFAULT-NEXT: ret <4 x float> [[TMP1]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -83,13 +69,6 @@ define <4 x float> @sqrt_4x(ptr %a) {
; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
; CHECK-NEXT: ret <4 x float> [[TMP1]]
;
-; DEFAULT-LABEL: define <4 x float> @sqrt_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
-; DEFAULT-NEXT: ret <4 x float> [[TMP1]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -117,13 +96,6 @@ define <4 x float> @int_sqrt_4x(ptr %a) {
; CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
; CHECK-NEXT: ret <4 x float> [[TMP1]]
;
-; DEFAULT-LABEL: define <4 x float> @int_sqrt_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
-; DEFAULT-NEXT: ret <4 x float> [[TMP1]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -158,19 +130,6 @@ define <4 x float> @exp_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @exp_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -205,19 +164,6 @@ define <4 x float> @int_exp_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_exp_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.exp.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -252,19 +198,6 @@ define <4 x float> @log_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @log_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -299,19 +232,6 @@ define <4 x float> @int_log_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_log_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.log.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -346,19 +266,6 @@ define <4 x float> @sin_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @sin_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -393,19 +300,6 @@ define <4 x float> @int_sin_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_sin_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.sin.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -440,19 +334,6 @@ define <4 x float> @asin_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @asin_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -487,19 +368,6 @@ define <4 x float> @int_asin_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_asin_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.asin.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -534,19 +402,6 @@ define <4 x float> @cos_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @cos_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -581,19 +436,6 @@ define <4 x float> @int_cos_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_cos_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.cos.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -628,19 +470,6 @@ define <4 x float> @acos_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @acos_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -675,19 +504,6 @@ define <4 x float> @int_acos_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_acos_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.acos.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -722,19 +538,6 @@ define <4 x float> @tan_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @tan_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -769,19 +572,6 @@ define <4 x float> @int_tan_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_tan_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.tan.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -816,19 +606,6 @@ define <4 x float> @atan_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @atan_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -863,19 +640,6 @@ define <4 x float> @int_atan_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_atan_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.atan.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -910,19 +674,6 @@ define <4 x float> @sinh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @sinh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -957,19 +708,6 @@ define <4 x float> @int_sinh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_sinh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.sinh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1009,24 +747,6 @@ define <4 x float> @asinh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @asinh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @asinhf(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @asinhf(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @asinhf(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @asinhf(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1066,24 +786,6 @@ define <4 x float> @int_asinh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @int_asinh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.asinh.f32(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.asinh.f32(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @llvm.asinh.f32(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @llvm.asinh.f32(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1118,19 +820,6 @@ define <4 x float> @cosh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @cosh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1165,19 +854,6 @@ define <4 x float> @int_cosh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_cosh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.cosh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1217,24 +893,6 @@ define <4 x float> @acosh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @acosh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @acoshf(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @acoshf(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @acoshf(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @acoshf(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1274,24 +932,6 @@ define <4 x float> @int_acosh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @int_acosh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.acosh.f32(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.acosh.f32(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @llvm.acosh.f32(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @llvm.acosh.f32(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1326,19 +966,6 @@ define <4 x float> @tanh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @tanh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1373,19 +1000,6 @@ define <4 x float> @int_tanh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
; CHECK-NEXT: ret <4 x float> [[VECINS_31]]
;
-; DEFAULT-LABEL: define <4 x float> @int_tanh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 0, i32 1>
-; DEFAULT-NEXT: [[TMP2:%.*]] = call fast <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP1]])
-; DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> poison, <2 x i32> <i32 2, i32 3>
-; DEFAULT-NEXT: [[TMP5:%.*]] = call fast <2 x float> @llvm.tanh.v2f32(<2 x float> [[TMP4]])
-; DEFAULT-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP5]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; DEFAULT-NEXT: [[VECINS_31:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP6]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_31]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1425,24 +1039,6 @@ define <4 x float> @atanh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @atanh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @atanhf(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @atanhf(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @atanhf(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @atanhf(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1482,24 +1078,6 @@ define <4 x float> @int_atanh_4x(ptr %a) {
; CHECK-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
; CHECK-NEXT: ret <4 x float> [[VECINS_3]]
;
-; DEFAULT-LABEL: define <4 x float> @int_atanh_4x
-; DEFAULT-SAME: (ptr [[A:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: entry:
-; DEFAULT-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[A]], align 16
-; DEFAULT-NEXT: [[VECEXT:%.*]] = extractelement <4 x float> [[TMP0]], i32 0
-; DEFAULT-NEXT: [[TMP1:%.*]] = tail call fast float @llvm.atanh.f32(float [[VECEXT]])
-; DEFAULT-NEXT: [[VECINS:%.*]] = insertelement <4 x float> poison, float [[TMP1]], i32 0
-; DEFAULT-NEXT: [[VECEXT_1:%.*]] = extractelement <4 x float> [[TMP0]], i32 1
-; DEFAULT-NEXT: [[TMP2:%.*]] = tail call fast float @llvm.atanh.f32(float [[VECEXT_1]])
-; DEFAULT-NEXT: [[VECINS_1:%.*]] = insertelement <4 x float> [[VECINS]], float [[TMP2]], i32 1
-; DEFAULT-NEXT: [[VECEXT_2:%.*]] = extractelement <4 x float> [[TMP0]], i32 2
-; DEFAULT-NEXT: [[TMP3:%.*]] = tail call fast float @llvm.atanh.f32(float [[VECEXT_2]])
-; DEFAULT-NEXT: [[VECINS_2:%.*]] = insertelement <4 x float> [[VECINS_1]], float [[TMP3]], i32 2
-; DEFAULT-NEXT: [[VECEXT_3:%.*]] = extractelement <4 x float> [[TMP0]], i32 3
-; DEFAULT-NEXT: [[TMP4:%.*]] = tail call fast float @llvm.atanh.f32(float [[VECEXT_3]])
-; DEFAULT-NEXT: [[VECINS_3:%.*]] = insertelement <4 x float> [[VECINS_2]], float [[TMP4]], i32 3
-; DEFAULT-NEXT: ret <4 x float> [[VECINS_3]]
-;
entry:
%0 = load <4 x float>, ptr %a, align 16
%vecext = extractelement <4 x float> %0, i32 0
@@ -1537,26 +1115,6 @@ define void @f(i1 %c, ptr %p, ptr %q, ptr %r) {
; CHECK-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[Q]], i64 1
; CHECK-NEXT: store i64 [[X1]], ptr [[Q1]], align 8
; CHECK-NEXT: ret void
-;
-; DEFAULT-LABEL: define void @f
-; DEFAULT-SAME: (i1 [[C:%.*]], ptr [[P:%.*]], ptr [[Q:%.*]], ptr [[R:%.*]]) #[[ATTR1]] {
-; DEFAULT-NEXT: [[X0:%.*]] = load i64, ptr [[P]], align 8
-; DEFAULT-NEXT: [[P1:%.*]] = getelementptr i64, ptr [[P]], i64 1
-; DEFAULT-NEXT: [[X1:%.*]] = load i64, ptr [[P1]], align 8
-; DEFAULT-NEXT: br i1 [[C]], label [[FOO:%.*]], label [[BAR:%.*]]
-; DEFAULT: foo:
-; DEFAULT-NEXT: [[Y0:%.*]] = load float, ptr [[R]], align 4
-; DEFAULT-NEXT: [[Y1:%.*]] = call float @fabsf(float [[Y0]])
-; DEFAULT-NEXT: br label [[BAZ:%.*]]
-; DEFAULT: bar:
-; DEFAULT-NEXT: [[Z0:%.*]] = load float, ptr [[R]], align 4
-; DEFAULT-NEXT: [[Z1:%.*]] = call float @fabsf(float [[Z0]])
-; DEFAULT-NEXT: br label [[BAZ]]
-; DEFAULT: baz:
-; DEFAULT-NEXT: store i64 [[X0]], ptr [[Q]], align 8
-; DEFAULT-NEXT: [[Q1:%.*]] = getelementptr i64, ptr [[Q]], i64 1
-; DEFAULT-NEXT: store i64 [[X1]], ptr [[Q1]], align 8
-; DEFAULT-NEXT: ret void
;
%x0 = load i64, ptr %p
%p1 = getelementptr i64, ptr %p, i64 1
@@ -1577,3 +1135,6 @@ baz:
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DEFAULT: {{.*}}
+; MAXVF0: {{.*}}
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
index ee8eb17575654..b3b9c08baeb1f 100644
--- a/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -passes=slp-vectorizer -S -mtriple=riscv64 --mattr=+v,+zvl256b < %s | FileCheck %s
-; RUN: opt -passes=slp-vectorizer -S -mtriple=riscv64 --mattr=+v,+zvl256b -slp-threshold=-2 < %s | FileCheck %s --check-prefix=THRESH
+; RUN: opt -passes=slp-vectorizer -S -mtriple=riscv64 --mattr=+v,+zvl256b < %s | FileCheck %s --check-prefixes=CHECK,DEFAULT
+; RUN: opt -passes=slp-vectorizer -S -mtriple=riscv64 --mattr=+v,+zvl256b -slp-threshold=-2 < %s | FileCheck %s --check-prefixes=CHECK,THRESH
define void @splat_trim(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, ptr %F, ptr %S) {
; CHECK-LABEL: define void @splat_trim(
@@ -35,38 +35,6 @@ define void @splat_trim(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, ptr %F, ptr %S)
; CHECK-NEXT: store <4 x i64> [[TMP5]], ptr [[S]], align 8
; CHECK-NEXT: ret void
;
-; THRESH-LABEL: define void @splat_trim(
-; THRESH-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]], ptr [[E:%.*]], ptr [[F:%.*]], ptr [[S:%.*]]) #[[ATTR0:[0-9]+]] {
-; THRESH-NEXT: [[ENTRY:.*:]]
-; THRESH-NEXT: [[A0:%.*]] = load i64, ptr [[A]], align 8
-; THRESH-NEXT: [[B0:%.*]] = load i64, ptr [[B]], align 8
-; THRESH-NEXT: [[C0:%.*]] = load i64, ptr [[C]], align 8
-; THRESH-NEXT: [[D0:%.*]] = load i64, ptr [[D]], align 8
-; THRESH-NEXT: [[E0:%.*]] = load i64, ptr [[E]], align 8
-; THRESH-NEXT: [[F0:%.*]] = load i64, ptr [[F]], align 8
-; THRESH-NEXT: [[V2:%.*]] = add i64 1, [[B0]]
-; THRESH-NEXT: [[V1:%.*]] = add i64 1, [[A0]]
-; THRESH-NEXT: [[AS2:%.*]] = add i64 [[V1]], [[V2]]
-; THRESH-NEXT: [[AS3:%.*]] = sub i64 [[V1]], [[V2]]
-; THRESH-NEXT: [[AS1:%.*]] = add i64 [[V1]], [[V2]]
-; THRESH-NEXT: [[AS0:%.*]] = add i64 [[V1]], [[V2]]
-; THRESH-NEXT: [[SH2:%.*]] = lshr i64 [[AS2]], [[E0]]
-; THRESH-NEXT: [[SH3:%.*]] = shl i64 [[AS3]], [[F0]]
-; THRESH-NEXT: [[SH1:%.*]] = lshr i64 [[AS1]], [[D0]]
-; THRESH-NEXT: [[SH0:%.*]] = shl i64 [[AS0]], [[C0]]
-; THRESH-NEXT: [[AS13:%.*]] = sub i64 [[SH2]], [[E0]]
-; THRESH-NEXT: [[AS12:%.*]] = add i64 [[SH3]], [[F0]]
-; THRESH-NEXT: [[AS11:%.*]] = add i64 [[SH1]], [[D0]]
-; THRESH-NEXT: [[AS10:%.*]] = add i64 [[SH0]], [[C0]]
-; THRESH-NEXT: [[TMP0:%.*]] = insertelement <4 x i64> poison, i64 [[AS10]], i64 0
-; THRESH-NEXT: [[TMP1:%.*]] = insertelement <4 x i64> [[TMP0]], i64 [[AS11]], i64 1
-; THRESH-NEXT: [[TMP2:%.*]] = insertelement <4 x i64> [[TMP1]], i64 [[AS12]], i64 2
-; THRESH-NEXT: [[TMP3:%.*]] = insertelement <4 x i64> [[TMP2]], i64 [[AS13]], i64 3
-; THRESH-NEXT: [[TMP4:%.*]] = add <4 x i64> [[TMP3]], splat (i64 1)
-; THRESH-NEXT: [[TMP5:%.*]] = add <4 x i64> [[TMP4]], splat (i64 1)
-; THRESH-NEXT: store <4 x i64> [[TMP5]], ptr [[S]], align 8
-; THRESH-NEXT: ret void
-;
entry:
%A0 = load i64, ptr %A, align 8
%B0 = load i64, ptr %B, align 8
@@ -150,41 +118,6 @@ define void @splat_trim_partial(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, ptr %F,
; CHECK-NEXT: store <4 x i64> [[TMP7]], ptr [[S]], align 8
; CHECK-NEXT: ret void
;
-; THRESH-LABEL: define void @splat_trim_partial(
-; THRESH-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]], ptr [[E:%.*]], ptr [[F:%.*]], ptr [[S:%.*]]) #[[ATTR0]] {
-; THRESH-NEXT: [[ENTRY:.*:]]
-; THRESH-NEXT: [[A0:%.*]] = load i64, ptr [[A]], align 8
-; THRESH-NEXT: [[B0:%.*]] = load i64, ptr [[B]], align 8
-; THRESH-NEXT: [[C0:%.*]] = load i64, ptr [[C]], align 8
-; THRESH-NEXT: [[D0:%.*]] = load i64, ptr [[D]], align 8
-; THRESH-NEXT: [[E0:%.*]] = load i64, ptr [[E]], align 8
-; THRESH-NEXT: [[F0:%.*]] = load i64, ptr [[F]], align 8
-; THRESH-NEXT: [[V3:%.*]] = add i64 1, [[E0]]
-; THRESH-NEXT: [[V2:%.*]] = add i64 1, [[B0]]
-; THRESH-NEXT: [[TMP4:%.*]] = add i64 1, [[A0]]
-; THRESH-NEXT: [[AS2:%.*]] = add i64 [[TMP4]], [[V2]]
-; THRESH-NEXT: [[AS3:%.*]] = sub i64 [[TMP4]], [[V2]]
-; THRESH-NEXT: [[AS1:%.*]] = add i64 [[TMP4]], [[V2]]
-; THRESH-NEXT: [[AS0:%.*]] = add i64 [[TMP4]], [[V2]]
-; THRESH-NEXT: [[SH2:%.*]] = lshr i64 [[AS2]], [[E0]]
-; THRESH-NEXT: [[SH3:%.*]] = shl i64 [[AS3]], [[F0]]
-; THRESH-NEXT: [[SH1:%.*]] = lshr i64 [[AS1]], [[D0]]
-; THRESH-NEXT: [[SH0:%.*]] = shl i64 [[AS0]], [[C0]]
-; THRESH-NEXT: [[AS13:%.*]] = sub i64 [[SH2]], [[E0]]
-; THRESH-NEXT: [[AS12:%.*]] = add i64 [[SH3]], [[F0]]
-; THRESH-NEXT: [[AS11:%.*]] = add i64 [[SH1]], [[D0]]
-; THRESH-NEXT: [[AS10:%.*]] = add i64 [[SH0]], [[C0]]
-; THRESH-NEXT: [[TMP5:%.*]] = insertelement <4 x i64> poison, i64 [[AS10]], i64 0
-; THRESH-NEXT: [[TMP6:%.*]] = insertelement <4 x i64> [[TMP5]], i64 [[AS11]], i64 1
-; THRESH-NEXT: [[TMP7:%.*]] = insertelement <4 x i64> [[TMP6]], i64 [[AS12]], i64 2
-; THRESH-NEXT: [[TMP8:%.*]] = insertelement <4 x i64> [[TMP7]], i64 [[AS13]], i64 3
-; THRESH-NEXT: [[TMP9:%.*]] = add <4 x i64> [[TMP8]], splat (i64 1)
-; THRESH-NEXT: [[TMP12:%.*]] = insertelement <4 x i64> poison, i64 [[V3]], i64 0
-; THRESH-NEXT: [[TMP10:%.*]] = shufflevector <4 x i64> [[TMP12]], <4 x i64> poison, <4 x i32> zeroinitializer
-; THRESH-NEXT: [[TMP11:%.*]] = add <4 x i64> [[TMP9]], [[TMP10]]
-; THRESH-NEXT: store <4 x i64> [[TMP11]], ptr [[S]], align 8
-; THRESH-NEXT: ret void
-;
entry:
%A0 = load i64, ptr %A, align 8
%B0 = load i64, ptr %B, align 8
@@ -232,3 +165,6 @@ entry:
store i64 %Add3, ptr %idxS3, align 8
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; DEFAULT: {{.*}}
+; THRESH: {{.*}}
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