[llvm] [AArch64] Remove FeatureFuseArithmeticLogic from Apple targets (PR #220511)

[Tomer Shafir via llvm-commits]

https://github.com/tomershafir updated https://github.com/llvm/llvm-project/pull/220511

>From ac11e6497b8dfca9e3cb48456d38d1ad7ebc7fb6 Mon Sep 17 00:00:00 2001
From: tomershafir <tomer.shafir8 at gmail.com>
Date: Wed, 2 Sep 2026 11:17:42 +0300
Subject: [PATCH] [AArch64] Remove FeatureFuseArithmeticLogic from Apple
 targets

As this kind of clustering has not proved to be beneficial.
---
 llvm/lib/Target/AArch64/AArch64Processors.td        | 1 -
 llvm/test/CodeGen/AArch64/sched-print-cycle.mir     | 6 +++---
 llvm/test/TableGen/aarch64-apple-tuning-features.td | 6 ------
 3 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td
index f996522ba4d09..1d22dd505902c 100644
--- a/llvm/lib/Target/AArch64/AArch64Processors.td
+++ b/llvm/lib/Target/AArch64/AArch64Processors.td
@@ -424,7 +424,6 @@ def TuneAppleA14 : SubtargetFeature<"apple-a14", "ARMProcFamily", "AppleA14",
                                     FeatureAggressiveFMA,
                                     FeatureAlignCmpCSelPairs,
                                     FeatureFastLD1Single,
-                                    FeatureFuseArithmeticLogic,
                                     FeatureFuseCmpCSel,
                                     FeatureFuseLiterals,
                                     FeatureMaxInterleaveFactor4])>;
diff --git a/llvm/test/CodeGen/AArch64/sched-print-cycle.mir b/llvm/test/CodeGen/AArch64/sched-print-cycle.mir
index d58037e987773..a9490b02c3d60 100644
--- a/llvm/test/CodeGen/AArch64/sched-print-cycle.mir
+++ b/llvm/test/CodeGen/AArch64/sched-print-cycle.mir
@@ -24,9 +24,9 @@ body:             |
 
 # CHECK-LABEL: *** Final schedule for %bb.0 ***
 # CHECK-NEXT: SU(0) [TopReadyCycle = 0, BottomReadyCycle = 0]:   $x1 = ADDXrr $x0, $x0
-# CHECK-NEXT: SU(1) [TopReadyCycle = 0, BottomReadyCycle = 1]:   $x2 = ADDXrr $x1, $x1
-# CHECK-NEXT: SU(2) [TopReadyCycle = 1, BottomReadyCycle = 0]:   $x3 = ADDXrr $x2, $x2
-# CHECK-NEXT: SU(3) [TopReadyCycle = 1, BottomReadyCycle = 0]:   $x4 = ADDXrr $x2, $x2
+# CHECK-NEXT: SU(1) [TopReadyCycle = 1, BottomReadyCycle = 1]:   $x2 = ADDXrr $x1, $x1
+# CHECK-NEXT: SU(2) [TopReadyCycle = 2, BottomReadyCycle = 0]:   $x3 = ADDXrr $x2, $x2
+# CHECK-NEXT: SU(3) [TopReadyCycle = 2, BottomReadyCycle = 0]:   $x4 = ADDXrr $x2, $x2
 
 # NOCYCLES-LABEL: *** Final schedule for %bb.0 ***
 # NOCYCLES-NEXT: SU(0):   $x1 = ADDXrr $x0, $x0
diff --git a/llvm/test/TableGen/aarch64-apple-tuning-features.td b/llvm/test/TableGen/aarch64-apple-tuning-features.td
index 89d2f03b0904d..c67fda4835bb2 100644
--- a/llvm/test/TableGen/aarch64-apple-tuning-features.td
+++ b/llvm/test/TableGen/aarch64-apple-tuning-features.td
@@ -104,7 +104,6 @@
 // CHECK-NEXT:    FeatureDisableLatencySchedHeuristic,
 // CHECK-NEXT:    FeatureFastLD1Single,
 // CHECK-NEXT:    FeatureFuseAES,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseLiterals,
@@ -132,7 +131,6 @@
 // CHECK-NEXT:    FeatureFastLD1Single,
 // CHECK-NEXT:    FeatureFuseAdrpAdd,
 // CHECK-NEXT:    FeatureFuseAES,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseLiterals,
@@ -160,7 +158,6 @@
 // CHECK-NEXT:    FeatureFastLD1Single,
 // CHECK-NEXT:    FeatureFuseAdrpAdd,
 // CHECK-NEXT:    FeatureFuseAES,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseFCmpFCSel,
@@ -189,7 +186,6 @@
 // CHECK-NEXT:    FeatureFastLD1Single,
 // CHECK-NEXT:    FeatureFuseAdrpAdd,
 // CHECK-NEXT:    FeatureFuseAES,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseFCmpFCSel,
@@ -241,7 +237,6 @@
 // CHECK-NEXT:    FeatureFuseAdrpAdd,
 // CHECK-NEXT:    FeatureFuseAES,
 // CHECK-NEXT:    FeatureFuseAppleSMECompute,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseFCmpFCSel,
@@ -270,7 +265,6 @@
 // CHECK-NEXT:    FeatureFuseAdrpAdd,
 // CHECK-NEXT:    FeatureFuseAES,
 // CHECK-NEXT:    FeatureFuseAppleSMECompute,
-// CHECK-NEXT:    FeatureFuseArithmeticLogic,
 // CHECK-NEXT:    FeatureFuseCryptoEOR,
 // CHECK-NEXT:    FeatureFuseCmpCSel,
 // CHECK-NEXT:    FeatureFuseFCmpFCSel,