[llvm] [AArch64] Account for fixed-SVE high-lane insertelement/extractelement costs (PR #219244)
Utpal Bora via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 2 08:50:58 PDT 2026
================
@@ -4599,6 +4599,21 @@ InstructionCost AArch64TTIImpl::getVectorInstrCostHelper(
if (Index == 0 && !Ty->getScalarType()->isIntegerTy())
return 0;
+ // SVE has no scalar move to or from an arbitrary lane above the low
+ // 128-bit portion of a Z register, e.g. there is no equivalent of
+ // "mov z0.d[9], d0". Fixed-length vectors wider than 128 bits therefore
+ // need extra work when scalarizing inserts/extracts for those lanes, so
+ // model them as more expensive than ordinary NEON lane accesses.
+ if (ST->useSVEForFixedLengthVectors() && isa<FixedVectorType>(Ty) &&
+ Ty->getScalarType()->isFloatingPointTy()) {
+ unsigned LowElts = 128 / Ty->getScalarSizeInBits();
----------------
utpalbora wrote:
Done
https://github.com/llvm/llvm-project/pull/219244
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