[llvm] [CodeGen][AMDGPU] Allow elementwise atomic load/store at element alignment (PR #219906)

[Harrison Hao via llvm-commits]

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@@ -230,6 +230,37 @@ static unsigned getAtomicOpSize(AtomicCmpXchgInst *CASI) {
   return DL.getTypeStoreSize(CASI->getCompareOperand()->getType());
 }
 
+static unsigned getAtomicOpElementSize(LoadInst *LI) {
+  if (!LI->isElementwise())
+    return getAtomicOpSize(LI);
+  return LI->getDataLayout().getTypeStoreSize(LI->getType()->getScalarType());
+}
+
+static unsigned getAtomicOpElementSize(StoreInst *SI) {
+  if (!SI->isElementwise())
+    return getAtomicOpSize(SI);
+  return SI->getDataLayout().getTypeStoreSize(
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harrisonGPU wrote:

Thanks, I have updated.

https://github.com/llvm/llvm-project/pull/219906