[llvm] f493cba - [RISCV] Add a helper class to share Zicond/XVentanaCondOps patterns. NFC (#219576)

[via llvm-commits]

Author: Craig Topper
Date: 2026-08-31T08:01:41-07:00
New Revision: f493cba68234bbe9d460f0298e613606ca453ec2

URL: https://github.com/llvm/llvm-project/commit/f493cba68234bbe9d460f0298e613606ca453ec2
DIFF: https://github.com/llvm/llvm-project/commit/f493cba68234bbe9d460f0298e613606ca453ec2.diff

LOG: [RISCV] Add a helper class to share Zicond/XVentanaCondOps patterns. NFC (#219576)

Assisted-by: Claude

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
    llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
index d309689378901..8cec2558f9923 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXVentana.td
@@ -28,26 +28,5 @@ def VT_MASKC : VTMaskedMove<0b110, "vt.maskc">,
 def VT_MASKCN : VTMaskedMove<0b111, "vt.maskcn">,
            Sched<[WriteIALU, ReadIALU, ReadIALU]>;
 
-let Predicates = [HasVendorXVentanaCondOps] in {
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
-          (VT_MASKC GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, GPR:$rc)),
-          (VT_MASKCN GPR:$rs1, GPR:$rc)>;
-
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
-          (VT_MASKC GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
-          (VT_MASKCN GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
-          (VT_MASKCN GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
-          (VT_MASKC GPR:$rs1, GPR:$rc)>;
-
-// (and (setcc a, b, ne), c) -> (vt.maskc c, (xor a, b))
-// (and (setcc a, b, eq), c) -> (vt.maskcn c, (xor a, b))
-// where c is known to be 0 or 1.
-def : Pat<(XLenVT (and (riscv_setne_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
-          (VT_MASKC GPR:$rc, GPR:$rs1)>;
-def : Pat<(XLenVT (and (riscv_seteq_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
-          (VT_MASKCN GPR:$rc, GPR:$rs1)>;
-} // Predicates = [HasVendorXVentanaCondOps]
+let Predicates = [HasVendorXVentanaCondOps] in
+defm : CondOpsPat<VT_MASKC, VT_MASKCN>;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
index 4861dc47ff133..2059d2b5c2ddc 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZicond.td
@@ -35,26 +35,31 @@ def CZERO_NEZ : ALU_rr<0b0000111, 0b111, "czero.nez">,
 // Pseudo-instructions and codegen patterns
 //===----------------------------------------------------------------------===//
 
-let Predicates = [HasStdExtZicond] in {
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
-          (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, GPR:$rc)),
-          (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
-
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
-          (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
-          (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
-          (CZERO_NEZ GPR:$rs1, GPR:$rc)>;
-def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
-          (CZERO_EQZ GPR:$rs1, GPR:$rc)>;
-
-// (and (setcc a, b, ne), c) -> (czero.eqz c, (xor a, b))
-// (and (setcc a, b, eq), c) -> (czero.nez c, (xor a, b))
-// where c is known to be 0 or 1.
-def : Pat<(XLenVT (and (riscv_setne_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
-          (CZERO_EQZ GPR:$rc, GPR:$rs1)>;
-def : Pat<(XLenVT (and (riscv_seteq_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
-          (CZERO_NEZ GPR:$rc, GPR:$rs1)>;
-} // Predicates = [HasStdExtZicond]
+// Zero (eqz) is instantiated with CZERO_EQZ or a compatible custom
+// instruction, and nez with CZERO_NEZ or a compatible custom instruction.
+multiclass CondOpsPat<Instruction eqz, Instruction nez> {
+  def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, GPR:$rc)),
+            (eqz GPR:$rs1, GPR:$rc)>;
+  def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, GPR:$rc)),
+            (nez GPR:$rs1, GPR:$rc)>;
+
+  def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
+            (eqz GPR:$rs1, GPR:$rc)>;
+  def : Pat<(XLenVT (riscv_czero_eqz GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
+            (nez GPR:$rs1, GPR:$rc)>;
+  def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_setne (XLenVT GPR:$rc)))),
+            (nez GPR:$rs1, GPR:$rc)>;
+  def : Pat<(XLenVT (riscv_czero_nez GPR:$rs1, (riscv_seteq (XLenVT GPR:$rc)))),
+            (eqz GPR:$rs1, GPR:$rc)>;
+
+  // (and (setcc a, b, ne), c) -> (eqz c, (xor a, b))
+  // (and (setcc a, b, eq), c) -> (nez c, (xor a, b))
+  // where c is known to be 0 or 1.
+  def : Pat<(XLenVT (and (riscv_setne_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
+            (eqz GPR:$rc, GPR:$rs1)>;
+  def : Pat<(XLenVT (and (riscv_seteq_oneuse (XLenVT GPR:$rs1)), zero_or_one:$rc)),
+            (nez GPR:$rc, GPR:$rs1)>;
+}
+
+let Predicates = [HasStdExtZicond] in
+defm : CondOpsPat<CZERO_EQZ, CZERO_NEZ>;