[llvm] [CodeGen] Invalidate register pressure set limits for each function (PR #219396)

[kefan cao via llvm-commits]

kefan203 wrote:

@nkotikal Thanks for the review. Yes. AMDGPU is currently the only handwritten 
target override I found whose pressure-set limit depends on additional 
MachineFunction state, so it is the target that exposes the bug.

However, I believe the invalidation belongs in RegisterClassInfo:

1. TargetRegisterInfo::getRegPressureSetLimit explicitly takes a
   MachineFunction, so its result is allowed to be function-specific.
2. PSetLimits is owned by RegisterClassInfo, and a target cannot invalidate it.
   Once a stale entry exists, the target hook is not called at all.
3. An AMDGPU-local fix would either have to remove the intended
   occupancy-dependent limit or introduce a target-specific invalidation
   mechanism into the generic analysis.
4. MachineRegisterClassAnalysis in the new pass manager already creates a fresh
   RegisterClassInfo for every MachineFunction. This change makes the legacy
   wrapper follow the same per-function semantics.

The change only clears the small PSetLimits array. Its storage is not
reallocated, pressure limits remain lazily computed, and the register-class
allocation-order cache is still preserved through the existing Tag logic.

Therefore, although AMDGPU provides the current reproducer, caching the result
of a MachineFunction-dependent target hook across functions is a general
CodeGen issue.

https://github.com/llvm/llvm-project/pull/219396