[llvm] [AMDGPU][CodeGen] Incrementally update reserved regs for SIPreAllocateWWMRegs pass in RegisterClassInfo (PR #212201)
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llvm-commits at lists.llvm.org
Fri Aug 28 10:52:06 PDT 2026
llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `lld-x86_64-ubuntu-fast` running on `as-builder-4` while building `llvm` at step 6 "test-build-unified-tree-check-all".
Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/43374
<details>
<summary>Here is the relevant piece of the build log for the reference</summary>
```
Step 6 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'LLVM :: CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
# RUN: at line 1
/home/buildbot/worker/lld-x86_64/build/bin/llc -mtriple=amdgpu9.0a-amd-amdhsa -passes="require<machine-register-class-info>,si-pre-allocate-wwm-regs,require<machine-register-class-info>" -debug-pass-manager -filetype=null /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir 2>&1 | /home/buildbot/worker/lld-x86_64/build/bin/FileCheck /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir
# executed command: /home/buildbot/worker/lld-x86_64/build/bin/llc -mtriple=amdgpu9.0a-amd-amdhsa '-passes=require<machine-register-class-info>,si-pre-allocate-wwm-regs,require<machine-register-class-info>' -debug-pass-manager -filetype=null /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir
# executed command: /home/buildbot/worker/lld-x86_64/build/bin/FileCheck /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir
# .---command stderr------------
# | /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir:11:10: error: CHECK: expected string not found in input
# | # CHECK: Running pass: RequireAnalysisPass<llvm::MachineRegisterClassAnalysis, llvm::MachineFunction{{.*}}> on test_wwm_reserved
# | ^
# | <stdin>:1:1: note: scanning from here
# | Running analysis: MachineModuleAnalysis on [module]
# | ^
# | <stdin>:6:1: note: possible intended match here
# | Running pass: RequireAnalysisPass<MachineRegisterClassAnalysis, MachineFunction> on test_wwm_reserved
# | ^
# |
# | Input file: <stdin>
# | Check file: /home/buildbot/worker/lld-x86_64/llvm-project/llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir
# |
# | -dump-input=help explains the following input dump.
# |
# | Input was:
# | <<<<<<
# | 1: Running analysis: MachineModuleAnalysis on [module]
# | check:11'0 { search range start (exclusive)
# | check:11'1 error: no match found in search range
# | 2: Running analysis: InnerAnalysisManagerProxy<AnalysisManager<Function>, Module> on [module]
# | 3: Running analysis: MachineFunctionAnalysis on test_wwm_reserved
# | 4: Running analysis: OuterAnalysisManagerProxy<AnalysisManager<Module>, Function> on test_wwm_reserved
# | 5: Running analysis: InnerAnalysisManagerProxy<AnalysisManager<MachineFunction>, Function> on test_wwm_reserved
# | 6: Running pass: RequireAnalysisPass<MachineRegisterClassAnalysis, MachineFunction> on test_wwm_reserved
# | check:11'2 ? possible intended match
# | 7: Running analysis: MachineRegisterClassAnalysis on test_wwm_reserved
# | 8: Running pass: SIPreAllocateWWMRegsPass on test_wwm_reserved
# | 9: Running analysis: LiveIntervalsAnalysis on test_wwm_reserved
# | 10: Running analysis: MachineDominatorTreeAnalysis on test_wwm_reserved
# | 11: Running analysis: SlotIndexesAnalysis on test_wwm_reserved
# | .
# | .
# | .
# | 150: dead $vgpr0 = V_MOV_B32_dpp $vgpr0, %0, 323, 12, 15, 0, implicit $exec
# | 151: $exec = EXIT_STRICT_WWM killed renamable $sgpr4_sgpr5
# | 152: dead %3:vgpr_32 = COPY %0
# | 153: %4:vreg_64 = IMPLICIT_DEF
# | 154: S_NOP 0, implicit %4
# | 155: ...
...
```
</details>
https://github.com/llvm/llvm-project/pull/212201
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