[llvm] VirtRegMap: Pass instruction and operand to readsUndefSubreg (PR #219485)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/219485

>From ccc8f19e57b7aee49e150c2356cf4313d9bea04e Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 28 Aug 2026 16:11:05 +0200
Subject: [PATCH 1/2] VirtRegMap: Pass instruction and operand to
 readsUndefSubreg

The helper recovered the instruction from the operand's parent to look up its
slot index. Pass the containing instruction and the operand directly so it no
longer depends on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
---
 llvm/lib/CodeGen/VirtRegMap.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 73e910027119e..b13051a7a314d 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -226,7 +226,7 @@ class VirtRegRewriter {
 
   void rewrite();
   void addMBBLiveIns();
-  bool readsUndefSubreg(const MachineOperand &MO) const;
+  bool readsUndefSubreg(const MachineInstr &MI, const MachineOperand &MO) const;
   void addLiveInsForSubRanges(const LiveInterval &LI, MCRegister PhysReg) const;
   void handleIdentityCopy(MachineInstr &MI);
   void expandCopyBundle(MachineInstr &MI) const;
@@ -464,14 +464,14 @@ void VirtRegRewriter::addMBBLiveIns() {
 
 /// Returns true if the given machine operand \p MO only reads undefined lanes.
 /// The function only works for use operands with a subregister set.
-bool VirtRegRewriter::readsUndefSubreg(const MachineOperand &MO) const {
+bool VirtRegRewriter::readsUndefSubreg(const MachineInstr &MI,
+                                       const MachineOperand &MO) const {
   // Shortcut if the operand is already marked undef.
   if (MO.isUndef())
     return true;
 
   Register Reg = MO.getReg();
   const LiveInterval &LI = LIS->getInterval(Reg);
-  const MachineInstr &MI = *MO.getParent();
   SlotIndex BaseIndex = LIS->getInstructionIndex(MI);
   // This code is only meant to handle reading undefined subregisters which
   // we couldn't properly detect before.
@@ -697,7 +697,7 @@ void VirtRegRewriter::rewrite() {
             }
           } else {
             if (MO.isUse()) {
-              if (readsUndefSubreg(MO))
+              if (readsUndefSubreg(MI, MO))
                 // We need to add an <undef> flag if the subregister is
                 // completely undefined (and we are not adding super-register
                 // defs).

>From f0b1dbed75fcb616583e8d8bd33645a77fcf7112 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 28 Aug 2026 17:21:25 +0200
Subject: [PATCH 2/2] Doc comment

---
 llvm/lib/CodeGen/VirtRegMap.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index b13051a7a314d..92a5996c733e4 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -462,8 +462,9 @@ void VirtRegRewriter::addMBBLiveIns() {
     MBB.sortUniqueLiveIns();
 }
 
-/// Returns true if the given machine operand \p MO only reads undefined lanes.
-/// The function only works for use operands with a subregister set.
+/// Returns true if the given machine operand \p MO of \p MI only reads
+/// undefined lanes.  The function only works for use operands with a
+/// subregister set.
 bool VirtRegRewriter::readsUndefSubreg(const MachineInstr &MI,
                                        const MachineOperand &MO) const {
   // Shortcut if the operand is already marked undef.