[llvm] [AMDGPU] Update MIR syntax for REG_SEQUENCE in tests (PR #219469)

via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 28 06:25:04 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Jay Foad (jayfoad)

<details>
<summary>Changes</summary>

Use names instead of numbers for the subreg index operands in
REG_SEQUENCE instructions.

I went back to when these tests were created to get the correct mapping:

  sub0,	// 1
  sub1,	// 2
  sub2,	// 3
  sub3,	// 4

  sub0_sub1,	// 17
  sub2_sub3,	// 18


---

Patch is 27.09 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/219469.diff


5 Files Affected:

- (modified) llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir (+24-24) 
- (modified) llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir (+9-9) 
- (modified) llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir (+20-20) 
- (modified) llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir (+6-6) 
- (modified) llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir (+24-24) 


``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir b/llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
index 9aa7bea2c4825..8d5017f17f612 100644
--- a/llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
+++ b/llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
@@ -46,14 +46,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
@@ -108,14 +108,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
@@ -171,14 +171,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
@@ -236,14 +236,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
@@ -313,14 +313,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
@@ -378,14 +378,14 @@ body:             |
     %4 = S_LOAD_DWORDX2_IMM %0, 9, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`)
     %24 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %25 = REG_SEQUENCE %3, 1, %24, 2
+    %25 = REG_SEQUENCE %3, %subreg.sub0, %24, %subreg.sub1
     %10 = S_MOV_B32 61440
     %11 = S_MOV_B32 0
-    %12 = REG_SEQUENCE killed %11, 1, killed %10, 2
-    %13 = REG_SEQUENCE killed %5, 17, %12, 18
+    %12 = REG_SEQUENCE killed %11, %subreg.sub0, killed %10, %subreg.sub1
+    %13 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %14 = S_MOV_B32 2
     %26 = V_LSHL_B64_e64 killed %25, 2, implicit $exec
-    %16 = REG_SEQUENCE killed %4, 17, %12, 18
+    %16 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %12, %subreg.sub2_sub3
     %18 = COPY %26
     %17 = BUFFER_LOAD_DWORD_ADDR64 %26, killed %13, 0, 0, 0, 0, implicit $exec
     %20 = V_ADD_F32_e64 0, killed %17, 0, 1065353216, 0, 0, implicit $mode, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
index 8ae713cd89d96..fbc53ac6e0dbe 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
@@ -158,7 +158,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = V_MOV_B32_e32 1065353216, implicit $exec
     %13 = V_ADD_F16_e64 0, killed %11, 0, %12, 0, 0, implicit $mode, implicit $exec
@@ -221,7 +221,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 1065353216, implicit $exec
@@ -288,7 +288,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
@@ -358,7 +358,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
@@ -424,7 +424,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 1, implicit $exec
@@ -490,7 +490,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %13 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
@@ -559,7 +559,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 15360, implicit $exec
@@ -624,7 +624,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 80886784, implicit $exec
@@ -686,7 +686,7 @@ body:             |
     %7 = COPY %6.sub0
     %8 = S_MOV_B32 61440
     %9 = S_MOV_B32 -1
-    %10 = REG_SEQUENCE killed %7, 1, killed %5, 2, killed %9, 3, killed %8, 4
+    %10 = REG_SEQUENCE killed %7, %subreg.sub0, killed %5, %subreg.sub1, killed %9, %subreg.sub2, killed %8, %subreg.sub3
     %11 = BUFFER_LOAD_DWORD_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s32) from `ptr addrspace(1) poison`)
     %12 = BUFFER_LOAD_USHORT_OFFSET %10, 0, 0, 0, 0, implicit $exec :: (volatile load (s16) from `ptr addrspace(1) poison`)
     %13 = V_MOV_B32_e32 305413120, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir b/llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
index 60de197abbe1e..444921baf036d 100644
--- a/llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
+++ b/llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
@@ -51,15 +51,15 @@ body:             |
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0
     %6 = S_LOAD_DWORDX2_IMM %0, 13, 0
     %27 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %28 = REG_SEQUENCE %3, 1, %27, 2
+    %28 = REG_SEQUENCE %3, %subreg.sub0, %27, %subreg.sub1
     %11 = S_MOV_B32 61440
     %12 = S_MOV_B32 0
-    %13 = REG_SEQUENCE killed %12, 1, killed %11, 2
-    %14 = REG_SEQUENCE killed %5, 17, %13, 18
+    %13 = REG_SEQUENCE killed %12, %subreg.sub0, killed %11, %subreg.sub1
+    %14 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %15 = S_MOV_B32 2
     %29 = V_LSHL_B64_e64 killed %28, killed %15, implicit $exec
-    %17 = REG_SEQUENCE killed %6, 17, %13, 18
-    %18 = REG_SEQUENCE killed %4, 17, %13, 18
+    %17 = REG_SEQUENCE killed %6, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
+    %18 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %20 = COPY %29
     %19 = BUFFER_LOAD_DWORD_ADDR64 %20, killed %14, 0, 0, 0, 0, implicit $exec
     %22 = COPY %29
@@ -122,15 +122,15 @@ body:             |
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0
     %6 = S_LOAD_DWORDX2_IMM %0, 13, 0
     %27 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %28 = REG_SEQUENCE %3, 1, %27, 2
+    %28 = REG_SEQUENCE %3, %subreg.sub0, %27, %subreg.sub1
     %11 = S_MOV_B32 61440
     %12 = S_MOV_B32 0
-    %13 = REG_SEQUENCE killed %12, 1, killed %11, 2
-    %14 = REG_SEQUENCE killed %5, 17, %13, 18
+    %13 = REG_SEQUENCE killed %12, %subreg.sub0, killed %11, %subreg.sub1
+    %14 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %15 = S_MOV_B32 2
     %29 = V_LSHL_B64_e64 killed %28, killed %15, implicit $exec
-    %17 = REG_SEQUENCE killed %6, 17, %13, 18
-    %18 = REG_SEQUENCE killed %4, 17, %13, 18
+    %17 = REG_SEQUENCE killed %6, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
+    %18 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %20 = COPY %29
     %19 = BUFFER_LOAD_DWORD_ADDR64 %20, killed %14, 0, 0, 0, 0, implicit $exec
     %22 = COPY %29
@@ -193,15 +193,15 @@ body:             |
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0
     %6 = S_LOAD_DWORDX2_IMM %0, 13, 0
     %27 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %28 = REG_SEQUENCE %3, 1, %27, 2
+    %28 = REG_SEQUENCE %3, %subreg.sub0, %27, %subreg.sub1
     %11 = S_MOV_B32 61440
     %12 = S_MOV_B32 0
-    %13 = REG_SEQUENCE killed %12, 1, killed %11, 2
-    %14 = REG_SEQUENCE killed %5, 17, %13, 18
+    %13 = REG_SEQUENCE killed %12, %subreg.sub0, killed %11, %subreg.sub1
+    %14 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %15 = S_MOV_B32 2
     %29 = V_LSHL_B64_e64 killed %28, killed %15, implicit $exec
-    %17 = REG_SEQUENCE killed %6, 17, %13, 18
-    %18 = REG_SEQUENCE killed %4, 17, %13, 18
+    %17 = REG_SEQUENCE killed %6, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
+    %18 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %20 = COPY %29
     %19 = BUFFER_LOAD_DWORD_ADDR64 %20, killed %14, 0, 0, 0, 0, implicit $exec
     %22 = COPY %29
@@ -264,15 +264,15 @@ body:             |
     %5 = S_LOAD_DWORDX2_IMM %0, 11, 0
     %6 = S_LOAD_DWORDX2_IMM %0, 13, 0
     %27 = V_ASHRREV_I32_e32 31, %3, implicit $exec
-    %28 = REG_SEQUENCE %3, 1, %27, 2
+    %28 = REG_SEQUENCE %3, %subreg.sub0, %27, %subreg.sub1
     %11 = S_MOV_B32 61440
     %12 = S_MOV_B32 0
-    %13 = REG_SEQUENCE killed %12, 1, killed %11, 2
-    %14 = REG_SEQUENCE killed %5, 17, %13, 18
+    %13 = REG_SEQUENCE killed %12, %subreg.sub0, killed %11, %subreg.sub1
+    %14 = REG_SEQUENCE killed %5, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %15 = S_MOV_B32 2
     %29 = V_LSHL_B64_e64 killed %28, killed %15, implicit $exec
-    %17 = REG_SEQUENCE killed %6, 17, %13, 18
-    %18 = REG_SEQUENCE killed %4, 17, %13, 18
+    %17 = REG_SEQUENCE killed %6, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
+    %18 = REG_SEQUENCE killed %4, %subreg.sub0_sub1, %13, %subreg.sub2_sub3
     %20 = COPY %29
     %19 = BUFFER_LOAD_DWORD_ADDR64 %20, killed %14, 0, 0, 0, 0, implicit $exec
     %22 = COPY %29
diff --git a/llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir b/llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
index d6e78801cf40a..6b3ef6c3b4547 100644
--- a/llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
@@ -112,7 +112,7 @@ body:             |
   ; GCN-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
   ; GCN-NEXT:   [[S_MOV_B32_3:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0
   ; GCN-NEXT:   [[REG_SEQUENCE3:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[S_MOV_B32_3]], %subreg.sub0, killed [[S_MOV_B32_2]], %subreg.sub1
-  ; GCN-NEXT:   [[REG_SEQUENCE4:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY2]], %subreg.sub1_sub2_sub3_sub4_sub5, killed [[REG_SEQUENCE3]], %subreg.sub1_sub2_sub3_sub4_sub5_sub6
+  ; GCN-NEXT:   [[REG_SEQUENCE4:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY2]], %subreg.sub0_sub1, killed [[REG_SEQUENCE3]], %subreg.sub2_sub3
   ; GCN-NEXT:   [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
   ; GCN-NEXT:   BUFFER_STORE_DWORD_ADDR64 killed [[V_MOV_B32_e32_1]], [[V_LSHL_B64_e64_]], killed [[REG_SEQUENCE4]], 0, 0, 0, 0, implicit $exec
   ; GCN-NEXT: {{  $}}
@@ -154,7 +154,7 @@ body:             |
     %25 = S_MOV_B32 61440
     %26 = S_MOV_B32 0
     %27 = REG_SEQUENCE killed %26, %subreg.sub0, killed %25, %subreg.sub1
-    %28 = REG_SEQUENCE %6, 17, killed %27, 18
+    %28 = REG_SEQUENCE %6, %subreg.sub0_sub1, killed %27, %subreg.sub2_sub3
     %29 = V_MOV_B32_e32 0, implicit $exec
     %30 = COPY %24
     BUFFER_STORE_DWORD_ADDR64 killed %29, killed %30, killed %28, 0, 0, 0, 0, implicit $exec
@@ -253,7 +253,7 @@ body:             |
   ; GCN-NEXT:   [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
   ; GCN-NEXT:   [[S_MOV_B32_2:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 0
   ; GCN-NEXT:   [[REG_SEQUENCE4:%[0-9]+]]:sgpr_64 = REG_SEQUENCE killed [[S_MOV_B32_2]], %subreg.sub0, killed [[S_MOV_B32_1]], %subreg.sub1
-  ; GCN-NEXT:   [[REG_SEQUENCE5:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY2]], %subreg.sub1_sub2_sub3_sub4_sub5, killed [[REG_SEQUENCE4]], %subreg.sub1_sub2_sub3_sub4_sub5_sub6
+  ; GCN-NEXT:   [[REG_SEQUENCE5:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY2]], %subreg.sub0_sub1, killed [[REG_SEQUENCE4]], %subreg.sub2_sub3
   ; GCN-NEXT:   [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
   ; GCN-NEXT:   [[COPY3:%[0-9]+]]:vreg_64 = COPY [[S_LSHL_B64_]]
   ; GCN-NEXT:   BUFFER_STORE_DWORD_ADDR64 killed [[V_MOV_B32_e32_2]], killed [[COPY3]], killed [[REG_SEQUENCE5]], 0, 0, 0, 0, implicit $exec
@@ -304,7 +304,7 @@ body:             |
     %34 = S_MOV_B32 61440
     %35 = S_MOV_B32 0
     %36 = REG_SEQUENCE killed %35, %subreg.sub0, killed %34, %subreg.sub1
-    %37 = REG_SEQUENCE %6, 17, killed %36, 18
+    %37 = REG_SEQUENCE %6, %subreg.sub0_sub1, killed %36, %subreg.sub2_sub3
     %38 = V_MOV_B32_e32 0, implicit $exec
     %39 = COPY %33
     BUFFER_STORE_DWORD_ADDR64 killed %38, killed %39, killed %37, 0, 0, 0, 0, implicit $exec
@@ -385,7 +385,7 @@ body:       ...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/219469


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