[llvm] [AMDGPU] Rework pseudo-scalar transcendental inline constant restriction handling (PR #208459)

[Frederik Harwath via llvm-commits]

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@@ -1232,9 +1232,13 @@ defm PseudoScalarTrans : AMDGPUSubtargetFeature<"pseudo-scalar-trans",
 
 defm NoF16PseudoScalarTransInlineConstants : AMDGPUSubtargetFeature<"no-f16-pseudo-scalar-trans-inline-constants",
   "Inline constants are not supported for F16 pseudo scalar transcendentals",
-  /*GenPredicate=*/0
+  /*GenPredicate=*/1
 >;
 
+def HasF16PseudoScalarTransWithInlineConstants :
+  Predicate<"Subtarget->hasPseudoScalarTrans() && !Subtarget->hasNoF16PseudoScalarTransInlineConstants()">,
+  AssemblerPredicate<(all_of FeaturePseudoScalarTrans, (not FeatureNoF16PseudoScalarTransInlineConstants))>;
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frederik-h wrote:

I added a few more showing the encoding of the inline constant values as literals on gfx12 and inline constants on gfx13, and disassembly tests for gfx12.

https://github.com/llvm/llvm-project/pull/208459