[llvm] RISCV: Pass MachineRegisterInfo to isVLKnownLE (PR #219402)

[Luke Lau via llvm-commits]

https://github.com/lukel97 commented:

Is this needed for the MIR block arguments work? It's not fundamentally opposed to plumbing it through manually but I intentionally fetched the MRI from the parent to avoid this in 633233c04cfa2a342cceaa0b4833fb35d61c3900 

https://github.com/llvm/llvm-project/pull/219402