[llvm] [AMDGPU][GlobalISel] Use MIR patterns for multi-opcode combiner rules. (PR #219278)

[Pierre van Houtryve via llvm-commits]

https://github.com/Pierre-vh approved this pull request.

LGTM, I am surprised to see some code changes. I think it may be due to commutative matching ? Seems like some operands were swapped and it results in slightly better code

https://github.com/llvm/llvm-project/pull/219278