[llvm] [AMDGPU] Fuse dword load + sign/zero-extension into subword load (PR #219019)

[Jay Foad via llvm-commits]

jayfoad wrote:

> I tried implementing this earlier in AMDGPULowerKernelArguments.cpp, but I found that it inhibits fusing adjacent loads into a wider load.

So if a B8 load is adjacent to a B32 load, you still want them merged into a single B64 load? I guess that makes sense. I'm not sure what to suggest. Teach AMDGPULowerKernelArguments how to do its own merging without relying on SILoadStoreOptimizer? Teach SILoadStoreOptimizer how to merge adjacent loads with different sizes?

https://github.com/llvm/llvm-project/pull/219019