[llvm] [AMDGPU] Mark `SI_WATERFALL_LOOP` as divergent in `hasDivergentBranch` (PR #218969)
Igor Wodiany via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 27 07:07:56 PDT 2026
https://github.com/IgWod updated https://github.com/llvm/llvm-project/pull/218969
>From 5b99cbb0e301580df3e480042788e55952f55e58 Mon Sep 17 00:00:00 2001
From: Igor Wodiany <igor.wodiany at amd.com>
Date: Wed, 26 Aug 2026 16:21:22 +0100
Subject: [PATCH] [AMDGPU] Mark `SI_WATERFALL_LOOP` as divergent in
`hasDivergentBranch`
This prevents incorrect sinking out of the waterfall loop.
---
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 ++-
.../AMDGPU/machine-sink-temporal-divergence-swdev407790.mir | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index bc419d813f171..009c6a5595148 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -3002,7 +3002,8 @@ SIInstrInfo::getBranchDestBlock(const MachineInstr &MI) const {
bool SIInstrInfo::hasDivergentBranch(const MachineBasicBlock *MBB) const {
for (const MachineInstr &MI : MBB->terminators()) {
if (MI.getOpcode() == AMDGPU::SI_IF || MI.getOpcode() == AMDGPU::SI_ELSE ||
- MI.getOpcode() == AMDGPU::SI_LOOP)
+ MI.getOpcode() == AMDGPU::SI_LOOP ||
+ MI.getOpcode() == AMDGPU::SI_WATERFALL_LOOP)
return true;
}
return false;
diff --git a/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir b/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
index b8a56d14aab23..c8afebf22e08d 100644
--- a/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
+++ b/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
@@ -209,12 +209,12 @@ body: |
; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec
; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[V_READFIRSTLANE_B32_]], [[COPY]], implicit $exec
; CHECK-NEXT: [[S_AND_SAVEEXEC_B32_:%[0-9]+]]:sreg_32_xm0_xexec = S_AND_SAVEEXEC_B32 killed [[V_CMP_EQ_U32_e64_]], implicit-def $exec, implicit-def $scc, implicit $exec
+ ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_READFIRSTLANE_B32_]], [[V_READFIRSTLANE_B32_]], 0, implicit $exec
; CHECK-NEXT: $exec_lo = S_XOR_B32_term $exec_lo, [[S_AND_SAVEEXEC_B32_]], implicit-def $scc
; CHECK-NEXT: SI_WATERFALL_LOOP %bb.1, implicit $exec
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: $exec_lo = S_MOV_B32 [[S_MOV_B32_]]
- ; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_READFIRSTLANE_B32_]], [[V_READFIRSTLANE_B32_]], 0, implicit $exec
; CHECK-NEXT: FLAT_STORE_DWORD [[COPY1]], [[V_ADD_U32_e64_]], 0, 0, implicit $exec, implicit $flat_scr :: (store (s32))
; CHECK-NEXT: SI_RETURN
bb.0:
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