[llvm] [AMDGPU] Detect illegal 64 relocs in SIFold (PR #219141)
David Stuttard via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 27 05:38:37 PDT 2026
================
@@ -5431,6 +5442,18 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
ErrInfo = "illegal 64-bit immediate value for operand.";
return false;
}
+ // A global with a 64-bit relocation resolves to a 64-bit literal at link
----------------
dstutt wrote:
It's an artefact of the way that expandPostRAPseudo handles global values - in that it can do the lowering to hi/lo if required. Before I added this check, mir lit tests were triggering this case in the verifier, even though they result in correct code. (Not sure why we never see the same issue with normal immediates - in theory they could also be using the same pseudo when 64 bit literals are not supported, and they are lowered in the same way in expandPostRAPseudo - possibly the mir lit test has MIR that in reality would never be produced - but is handled anyway).
Good point about not needing the check - I'll update that.
https://github.com/llvm/llvm-project/pull/219141
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