[llvm] [SLP][NFC]Add a test with reused scalar in trimmed subtrees, NFC (PR #219197)

[via llvm-commits]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms

Author: Alexey Bataev (alexey-bataev)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/219197.diff


1 Files Affected:

- (added) llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll (+82) 


``````````diff
diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
new file mode 100644
index 0000000000000..a4fc6d48f80cc
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
@@ -0,0 +1,82 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -passes=slp-vectorizer -S -mtriple=riscv64 --mattr=+v,+zvl256b < %s | FileCheck %s
+
+define void @splat_trim(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, ptr %F, ptr %S) {
+; CHECK-LABEL: define void @splat_trim(
+; CHECK-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[C:%.*]], ptr [[D:%.*]], ptr [[E:%.*]], ptr [[F:%.*]], ptr [[S:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[A0:%.*]] = load i64, ptr [[A]], align 8
+; CHECK-NEXT:    [[B0:%.*]] = load i64, ptr [[B]], align 8
+; CHECK-NEXT:    [[C0:%.*]] = load i64, ptr [[C]], align 8
+; CHECK-NEXT:    [[D0:%.*]] = load i64, ptr [[D]], align 8
+; CHECK-NEXT:    [[E0:%.*]] = load i64, ptr [[E]], align 8
+; CHECK-NEXT:    [[F0:%.*]] = load i64, ptr [[F]], align 8
+; CHECK-NEXT:    [[V1:%.*]] = add i64 1, [[A0]]
+; CHECK-NEXT:    [[V2:%.*]] = add i64 1, [[B0]]
+; CHECK-NEXT:    [[AS2:%.*]] = add i64 [[V1]], [[V2]]
+; CHECK-NEXT:    [[AS3:%.*]] = sub i64 [[V1]], [[V2]]
+; CHECK-NEXT:    [[AS1:%.*]] = add i64 [[V1]], [[V2]]
+; CHECK-NEXT:    [[AS0:%.*]] = add i64 [[V1]], [[V2]]
+; CHECK-NEXT:    [[SH2:%.*]] = lshr i64 [[AS2]], [[E0]]
+; CHECK-NEXT:    [[SH3:%.*]] = shl i64 [[AS3]], [[F0]]
+; CHECK-NEXT:    [[SH1:%.*]] = lshr i64 [[AS1]], [[D0]]
+; CHECK-NEXT:    [[SH0:%.*]] = shl i64 [[AS0]], [[C0]]
+; CHECK-NEXT:    [[AS13:%.*]] = sub i64 [[SH2]], [[E0]]
+; CHECK-NEXT:    [[AS12:%.*]] = add i64 [[SH3]], [[F0]]
+; CHECK-NEXT:    [[AS11:%.*]] = add i64 [[SH1]], [[D0]]
+; CHECK-NEXT:    [[AS10:%.*]] = add i64 [[SH0]], [[C0]]
+; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x i64> poison, i64 [[AS10]], i64 0
+; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x i64> [[TMP0]], i64 [[AS11]], i64 1
+; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <4 x i64> [[TMP1]], i64 [[AS12]], i64 2
+; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <4 x i64> [[TMP2]], i64 [[AS13]], i64 3
+; CHECK-NEXT:    [[TMP4:%.*]] = add <4 x i64> [[TMP3]], splat (i64 1)
+; CHECK-NEXT:    [[TMP5:%.*]] = add <4 x i64> [[TMP4]], splat (i64 1)
+; CHECK-NEXT:    store <4 x i64> [[TMP5]], ptr [[S]], align 8
+; CHECK-NEXT:    ret void
+;
+entry:
+  %A0 = load i64, ptr %A, align 8
+  %B0 = load i64, ptr %B, align 8
+  %C0 = load i64, ptr %C, align 8
+  %D0 = load i64, ptr %D, align 8
+  %E0 = load i64, ptr %E, align 8
+  %F0 = load i64, ptr %F, align 8
+
+  %v1 = add i64 1, %A0
+  %v2 = add i64 1, %B0
+
+  %AS0 = add i64 %v1, %v2
+  %AS1 = add i64 %v1, %v2
+  %AS2 = add i64 %v1, %v2
+  %AS3 = sub i64 %v1, %v2
+
+  %Sh0 = shl i64 %AS0, %C0
+  %Sh1 = lshr i64 %AS1, %D0
+  %Sh2 = lshr i64 %AS2, %E0
+  %Sh3 = shl i64 %AS3, %F0
+
+  %AS10 = add i64 %Sh0, %C0
+  %AS11 = add i64 %Sh1, %D0
+  %AS12 = add i64 %Sh3, %F0
+  %AS13 = sub i64 %Sh2, %E0
+
+  %AS20 = add i64 %AS10, 1
+  %AS21 = add i64 %AS11, 1
+  %AS22 = add i64 %AS12, 1
+  %AS23 = add i64 %AS13, 1
+
+  %Add0 = add i64 %AS20, 1
+  %Add1 = add i64 %AS21, 1
+  %Add2 = add i64 %AS22, 1
+  %Add3 = add i64 %AS23, 1
+
+  %idxS1 = getelementptr inbounds i64, ptr %S, i64 1
+  %idxS2 = getelementptr inbounds i64, ptr %S, i64 2
+  %idxS3 = getelementptr inbounds i64, ptr %S, i64 3
+
+  store i64 %Add0, ptr %S, align 8
+  store i64 %Add1, ptr %idxS1, align 8
+  store i64 %Add2, ptr %idxS2, align 8
+  store i64 %Add3, ptr %idxS3, align 8
+  ret void
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/219197