[llvm] [AArch64] Add DAG combine to widen v3i8/v4i8 VECTOR_MATCH needles (PR #218972)

[Paul Walker via llvm-commits]

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@@ -1656,6 +1656,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
 
       for (MVT VT : {MVT::v16i1, MVT::v8i1, MVT::v16i8, MVT::v8i8})
         setOperationAction(ISD::VECTOR_MATCH, VT, Custom);
+
+      setTargetDAGCombine(ISD::VECTOR_MATCH);
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paulwalker-arm wrote:

No it doesn't.  Most uses of `getTypeAction()` pick a single type, typically the result type, but there are some, type legislation in this case, that query the operand type.

https://github.com/llvm/llvm-project/pull/218972