[llvm] [AArch64] Add DAG combine to widen v3i8/v4i8 VECTOR_MATCH needles (PR #218972)

[Benjamin Maxwell via llvm-commits]

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@@ -1656,6 +1656,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
 
       for (MVT VT : {MVT::v16i1, MVT::v8i1, MVT::v16i8, MVT::v8i8})
         setOperationAction(ISD::VECTOR_MATCH, VT, Custom);
+
+      setTargetDAGCombine(ISD::VECTOR_MATCH);
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MacDue wrote:

The loop above is sets the operation action based on the result type not the needle type. The needle type does not need to match the result vector length (and never does in the case of scalable vectors).

https://github.com/llvm/llvm-project/pull/218972