[llvm] [SLSR] Prove disjoint instruction reuse using an annotation-free IR (PR #218308)

Sjoerd Meijer via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 27 00:33:38 PDT 2026


sjoerdmeijer wrote:

I first did some 'fuzzing' with AI again, and it came up with this counter example:

```
target datalayout = "e-P1-p:32:32-p1:64:64"

define { i64, i64 } @counterexample(i64 %s) addrspace(1) {
entry:
  br label %body

body:
  %bits = ptrtoint ptr addrspace(1)
      blockaddress(@counterexample, %body) to i64

  %or = or disjoint i64 %bits, 4294967296
  %mul0 = mul i64 %or, %s
  %safe0 = freeze i64 %mul0

  %add = add i64 %bits, 4294967297
  %mul1 = mul i64 %add, %s

  %r0 = insertvalue { i64, i64 } poison, i64 %safe0, 0
  %r1 = insertvalue { i64, i64 } %r0, i64 %mul1, 1
  ret { i64, i64 } %r1
}
```

This gets miscompiled because it is dropping the address space, and then later comes to the wrong conclusions. 

https://github.com/llvm/llvm-project/pull/218308


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