[llvm] [VPlan] Lower safe uniform load to unconditional scalar load (PR #216767)

[Shih-Po Hung via llvm-commits]

arcbbb wrote:

> But maybe we should just eagerly lower the safe uniform loads to scalar loads early, and then have a separate transform to convertToStridedAccesses that converts scalar loads that are broadcasted to vp.strided.loads. I'll try and think about this a bit more.

Would it make sense to canonicalize zero-stride loads to scalar load + broadcast?
RISCVDAGToDAGISel::Select can convert it back if needed, and passes like RISCVCodeGenPrepare::expandVPStrideLoad already expand zero-stride loads anyway.

https://github.com/llvm/llvm-project/pull/216767