[llvm] [AMDGPU] Enable CSE in the GlobalISel post-legalizer combiner (PR #217258)

[Keshav Vinayak Jha via llvm-commits]

================
@@ -7773,7 +7798,23 @@ bool AMDGPULegalizerInfo::legalizeTrapEndpgm(
   // We need a block split to make the real endpgm a terminator. We also don't
   // want to break phis in successor blocks, so we can't just delete to the
   // end of the block.
+  // An instruction's parent block is part of its CSE profile, so notify
+  // observers about the instructions moved by the split.
+  GISelChangeObserver *Observer = MF->getObserver();
+  SmallVector<MachineInstr *, 8> MovedInstrs;
+  MachineBasicBlock::iterator SplitPoint(&MI);
+  ++SplitPoint;
+  if (Observer && SplitPoint != BB.end()) {
+    for (MachineInstr &MovedMI : make_range(SplitPoint, BB.end())) {
+      Observer->changingInstr(MovedMI);
+      MovedInstrs.push_back(&MovedMI);
+    }
+  }
   BB.splitAt(MI, false /*UpdateLiveIns*/);
+  if (Observer) {
+    for (MachineInstr *MovedMI : MovedInstrs)
+      Observer->changedInstr(*MovedMI);
+  }
----------------
keshavvinayak01 wrote:

Yes, but this change will definitely trip up this split. Separated out this patch as a pre-requisite: https://github.com/llvm/llvm-project/pull/219128

https://github.com/llvm/llvm-project/pull/217258