[llvm] [VPlan] Lower safe uniform load to unconditional scalar load (Alt. approach) (PR #217564)

[Shih-Po Hung via llvm-commits]

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@@ -5745,7 +5716,6 @@ void VPlanTransforms::convertToStridedAccesses(VPlan &Plan,
     for (VPRecipeBase &R : make_early_inc_range(*VPBB)) {
       auto *MemR = dyn_cast<VPWidenMemoryRecipe>(&R);
       // TODO: Transform reverse access into strided access with -1 stride.
-      // TODO: Transform gather/scatter with uniform address into strided access
       // with 0 stride.
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arcbbb wrote:

Oops, fixed. Thanks!

https://github.com/llvm/llvm-project/pull/217564