[llvm] [KnownFPClass] Fix KnownFPClass::frexp subnormal mode handling (PR #219114)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 26 22:25:29 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-globalisel
Author: ZERICO2005
<details>
<summary>Changes</summary>
Fixes a bug where positive-zero would be incorrectly ruled out since a negative-subnormal could flush to positive-zero.
Also update demanded `KnownFPClass` propagation for `frexp` to account for negative subnormal inputs that may flush to +0.0.
Additionally, teach `SimplifyDemandedUseFPClass` that `frexp(+-0.0, ptr) == +-0.0` (`+-inf` and `NaN` were already handled prior).
Part of https://github.com/llvm/llvm-project/pull/219091
---
Patch is 47.27 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/219114.diff
7 Files Affected:
- (modified) llvm/lib/Analysis/ValueTracking.cpp (+17-2)
- (modified) llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp (+17-1)
- (modified) llvm/lib/Support/KnownFPClass.cpp (+21-17)
- (modified) llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (+18-5)
- (modified) llvm/test/Transforms/Attributor/nofpclass-frexp.ll (+113-42)
- (modified) llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-frexp.ll (+73-19)
- (modified) llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp (+23)
``````````diff
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 3df80238e638e..da96907d30fd1 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -6218,11 +6218,26 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
if (const auto *II = dyn_cast<IntrinsicInst>(Src)) {
switch (II->getIntrinsicID()) {
case Intrinsic::frexp: {
- Known.knownNot(fcSubnormal);
+ FPClassTest InterestedSrcs = InterestedClasses;
+
+ // Positive subnormals and negative subnormals could become positive
+ // zero.
+ if (InterestedClasses & fcPosZero)
+ InterestedSrcs |= fcSubnormal;
+
+ // Negative subnormals could become negative zero.
+ if (InterestedClasses & fcNegZero)
+ InterestedSrcs |= fcNegSubnormal;
+
+ if (InterestedClasses & fcPosNormal)
+ InterestedSrcs |= fcPosSubnormal;
+
+ if (InterestedClasses & fcNegNormal)
+ InterestedSrcs |= fcNegSubnormal;
KnownFPClass KnownSrc;
computeKnownFPClass(II->getArgOperand(0), DemandedElts,
- InterestedClasses, KnownSrc, Q, Depth + 1);
+ InterestedSrcs, KnownSrc, Q, Depth + 1);
const Function *F = cast<Instruction>(Op)->getFunction();
const fltSemantics &FltSem =
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index f288eadf82e3c..578614c3b22f5 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -1930,8 +1930,24 @@ void GISelValueTracking::computeKnownFPClass(Register R,
if (R != MI.getOperand(0).getReg())
break;
Register Src = MI.getOperand(2).getReg();
+ FPClassTest InterestedSrcs = InterestedClasses;
+
+ // Positive subnormals and negative subnormals could become positive zero.
+ if (InterestedClasses & fcPosZero)
+ InterestedSrcs |= fcSubnormal;
+
+ // Negative subnormals could become negative zero.
+ if (InterestedClasses & fcNegZero)
+ InterestedSrcs |= fcNegSubnormal;
+
+ if (InterestedClasses & fcPosNormal)
+ InterestedSrcs |= fcPosSubnormal;
+
+ if (InterestedClasses & fcNegNormal)
+ InterestedSrcs |= fcNegSubnormal;
+
KnownFPClass KnownSrc;
- computeKnownFPClass(Src, DemandedElts, InterestedClasses, KnownSrc,
+ computeKnownFPClass(Src, DemandedElts, InterestedSrcs, KnownSrc,
Depth + 1);
DenormalMode Mode =
MF->getDenormalMode(getFltSemanticForLLT(DstTy.getScalarType()));
diff --git a/llvm/lib/Support/KnownFPClass.cpp b/llvm/lib/Support/KnownFPClass.cpp
index 2680abaddfc12..41bb706f560c1 100644
--- a/llvm/lib/Support/KnownFPClass.cpp
+++ b/llvm/lib/Support/KnownFPClass.cpp
@@ -829,27 +829,31 @@ KnownFPClass KnownFPClass::roundToIntegral(const KnownFPClass &KnownSrc,
KnownFPClass KnownFPClass::frexp_mant(const KnownFPClass &KnownSrc,
DenormalMode Mode) {
KnownFPClass Known;
+
Known.knownNot(fcSubnormal);
- if (KnownSrc.isKnownNever(fcNegative))
- Known.knownNot(fcNegative);
- else {
- if (KnownSrc.isKnownNeverLogicalNegZero(Mode))
- Known.knownNot(fcNegZero);
- if (KnownSrc.isKnownNever(fcNegInf))
- Known.knownNot(fcNegInf);
- }
+ Known.propagateNonNaN(KnownSrc);
- if (KnownSrc.isKnownNever(fcPositive))
- Known.knownNot(fcPositive);
- else {
- if (KnownSrc.isKnownNeverLogicalPosZero(Mode))
- Known.knownNot(fcPosZero);
- if (KnownSrc.isKnownNever(fcPosInf))
- Known.knownNot(fcPosInf);
- }
+ if (KnownSrc.isKnownNeverPosInfinity())
+ Known.knownNot(fcPosInf);
+
+ if (KnownSrc.isKnownNeverNegInfinity())
+ Known.knownNot(fcNegInf);
+
+ if (KnownSrc.isKnownNeverLogicalPosZero(Mode))
+ Known.knownNot(fcPosZero);
+
+ if (KnownSrc.isKnownNeverLogicalNegZero(Mode))
+ Known.knownNot(fcNegZero);
+
+ // TODO: These deductions can be improved if subnormal inputs are guaranteed
+ // to be flushed to zero.
+ if (KnownSrc.isKnownNever(fcPosNormal | fcPosSubnormal))
+ Known.knownNot(fcPosNormal);
+
+ if (KnownSrc.isKnownNever(fcNegNormal | fcNegSubnormal))
+ Known.knownNot(fcNegNormal);
- Known.propagateNonNaN(KnownSrc);
return Known;
}
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 0a7c0375106f2..56ce5a12dae0f 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -3516,12 +3516,24 @@ Value *InstCombinerImpl::SimplifyDemandedUseFPClass(Instruction *I,
switch (IID) {
case Intrinsic::frexp: {
FPClassTest SrcDemandedMask = fcNone;
+
if (DemandedMask & fcNan)
SrcDemandedMask |= fcNan;
- if (DemandedMask & fcNegFinite)
- SrcDemandedMask |= fcNegFinite;
- if (DemandedMask & fcPosFinite)
- SrcDemandedMask |= fcPosFinite;
+
+ // Positive subnormals and negative subnormals could become positive
+ // zero.
+ if (DemandedMask & fcPosZero)
+ SrcDemandedMask |= fcPosZero | fcSubnormal;
+
+ // Negative subnormals could become negative zero.
+ if (DemandedMask & fcNegZero)
+ SrcDemandedMask |= fcNegZero | fcNegSubnormal;
+
+ if (DemandedMask & (fcNegNormal | fcNegSubnormal))
+ SrcDemandedMask |= fcNegNormal | fcNegSubnormal;
+ if (DemandedMask & (fcPosNormal | fcPosSubnormal))
+ SrcDemandedMask |= fcPosNormal | fcPosSubnormal;
+
if (DemandedMask & fcPosInf)
SrcDemandedMask |= fcPosInf;
if (DemandedMask & fcNegInf)
@@ -3543,7 +3555,8 @@ Value *InstCombinerImpl::SimplifyDemandedUseFPClass(Instruction *I,
/*IsCanonicalizing=*/true))
return SingleVal;
- if (Known.isKnownAlways(fcInf | fcNan))
+ // frexp returns zero, infinity, and NaN inputs unchanged.
+ if (KnownSrc.isKnownAlways(fcZero | fcInf | fcNan))
return II->getArgOperand(0);
return nullptr;
diff --git a/llvm/test/Transforms/Attributor/nofpclass-frexp.ll b/llvm/test/Transforms/Attributor/nofpclass-frexp.ll
index 085647bb2b6f0..c5a990e9e9252 100644
--- a/llvm/test/Transforms/Attributor/nofpclass-frexp.ll
+++ b/llvm/test/Transforms/Attributor/nofpclass-frexp.ll
@@ -8,7 +8,7 @@ declare { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float>)
define { float, i32 } @ret_frexp_f32(float %arg0) {
; CHECK-LABEL: define { float, i32 } @ret_frexp_f32
; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR1:[0-9]+]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[ARG0]]) #[[ATTR7:[0-9]+]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float [[ARG0]]) #[[ATTR8:[0-9]+]]
; CHECK-NEXT: ret { float, i32 } [[CALL]]
;
%call = call { float, i32 } @llvm.frexp.f32.i32(float %arg0)
@@ -18,7 +18,7 @@ define { float, i32 } @ret_frexp_f32(float %arg0) {
define { float, i32 } @ret_frexp_f32_nonan(float nofpclass(nan) %arg0) {
; CHECK-LABEL: define { float, i32 } @ret_frexp_f32_nonan
; CHECK-SAME: (float nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: ret { float, i32 } [[CALL]]
;
%call = call { float, i32 } @llvm.frexp.f32.i32(float %arg0)
@@ -28,7 +28,7 @@ define { float, i32 } @ret_frexp_f32_nonan(float nofpclass(nan) %arg0) {
define float @ret_frexp_f32_0_nonan(float nofpclass(nan) %arg0) {
; CHECK-LABEL: define nofpclass(nan sub) float @ret_frexp_f32_0_nonan
; CHECK-SAME: (float nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -40,7 +40,7 @@ define float @ret_frexp_f32_0_nonan(float nofpclass(nan) %arg0) {
define float @ret_frexp_f32_0_nosnan(float nofpclass(snan) %arg0) {
; CHECK-LABEL: define nofpclass(snan sub) float @ret_frexp_f32_0_nosnan
; CHECK-SAME: (float nofpclass(snan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(snan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(snan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -52,7 +52,7 @@ define float @ret_frexp_f32_0_nosnan(float nofpclass(snan) %arg0) {
define float @ret_frexp_f32_0_noqnan(float nofpclass(qnan) %arg0) {
; CHECK-LABEL: define nofpclass(sub) float @ret_frexp_f32_0_noqnan
; CHECK-SAME: (float nofpclass(qnan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(qnan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(qnan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -64,7 +64,7 @@ define float @ret_frexp_f32_0_noqnan(float nofpclass(qnan) %arg0) {
define i32 @ret_frexp_f32_1_nonan(float nofpclass(nan) %arg0) {
; CHECK-LABEL: define i32 @ret_frexp_f32_1_nonan
; CHECK-SAME: (float nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_1:%.*]] = extractvalue { float, i32 } [[CALL]], 1
; CHECK-NEXT: ret i32 [[CALL_1]]
;
@@ -76,7 +76,7 @@ define i32 @ret_frexp_f32_1_nonan(float nofpclass(nan) %arg0) {
define <2 x float> @ret_frexp_v2f32_0_nonan(<2 x float> nofpclass(nan) %arg0) {
; CHECK-LABEL: define nofpclass(nan sub) <2 x float> @ret_frexp_v2f32_0_nonan
; CHECK-SAME: (<2 x float> nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { <2 x float>, <2 x i32> } [[CALL]], 0
; CHECK-NEXT: ret <2 x float> [[CALL_0]]
;
@@ -88,7 +88,7 @@ define <2 x float> @ret_frexp_v2f32_0_nonan(<2 x float> nofpclass(nan) %arg0) {
define <2 x i32> @ret_frexp_v2f32_1_nonan(<2 x float> nofpclass(nan) %arg0) {
; CHECK-LABEL: define <2 x i32> @ret_frexp_v2f32_1_nonan
; CHECK-SAME: (<2 x float> nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { <2 x float>, <2 x i32> } [[CALL]], 1
; CHECK-NEXT: ret <2 x i32> [[CALL_0]]
;
@@ -100,7 +100,7 @@ define <2 x i32> @ret_frexp_v2f32_1_nonan(<2 x float> nofpclass(nan) %arg0) {
define float @ret_frexp_v4f32_0_nonan_elt1(<4 x float> nofpclass(nan) %arg0) {
; CHECK-LABEL: define nofpclass(nan sub) float @ret_frexp_v4f32_0_nonan_elt1
; CHECK-SAME: (<4 x float> nofpclass(nan) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> nofpclass(nan) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { <4 x float>, <4 x i32> } @llvm.frexp.v4f32.v4i32(<4 x float> nofpclass(nan) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { <4 x float>, <4 x i32> } [[CALL]], 0
; CHECK-NEXT: [[ELT_2:%.*]] = extractelement <4 x float> [[CALL_0]], i32 2
; CHECK-NEXT: ret float [[ELT_2]]
@@ -114,7 +114,7 @@ define float @ret_frexp_v4f32_0_nonan_elt1(<4 x float> nofpclass(nan) %arg0) {
define float @ret_frexp_f32_0_nopos_nopzero(float nofpclass(pinf psub pnorm pzero) %arg0) {
; CHECK-LABEL: define nofpclass(pinf pzero sub pnorm) float @ret_frexp_f32_0_nopos_nopzero
; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf pzero psub pnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf pzero psub pnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -126,7 +126,7 @@ define float @ret_frexp_f32_0_nopos_nopzero(float nofpclass(pinf psub pnorm pzer
define float @ret_frexp_f32_0_nopos_nopzero_nonan(float nofpclass(pinf psub pnorm pzero nan) %arg0) {
; CHECK-LABEL: define nofpclass(nan pinf pzero sub pnorm) float @ret_frexp_f32_0_nopos_nopzero_nonan
; CHECK-SAME: (float nofpclass(nan pinf pzero psub pnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan pinf pzero psub pnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan pinf pzero psub pnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -136,9 +136,9 @@ define float @ret_frexp_f32_0_nopos_nopzero_nonan(float nofpclass(pinf psub pnor
}
define float @ret_frexp_f32_0_nopos(float nofpclass(pinf psub pnorm) %arg0) {
-; CHECK-LABEL: define nofpclass(pinf sub) float @ret_frexp_f32_0_nopos
+; CHECK-LABEL: define nofpclass(pinf sub pnorm) float @ret_frexp_f32_0_nopos
; CHECK-SAME: (float nofpclass(pinf psub pnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf psub pnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf psub pnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -148,9 +148,9 @@ define float @ret_frexp_f32_0_nopos(float nofpclass(pinf psub pnorm) %arg0) {
}
define float @ret_frexp_f32_0_nopos_nonan(float nofpclass(pinf psub pnorm nan) %arg0) {
-; CHECK-LABEL: define nofpclass(nan pinf sub) float @ret_frexp_f32_0_nopos_nonan
+; CHECK-LABEL: define nofpclass(nan pinf sub pnorm) float @ret_frexp_f32_0_nopos_nonan
; CHECK-SAME: (float nofpclass(nan pinf psub pnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan pinf psub pnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan pinf psub pnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -162,7 +162,7 @@ define float @ret_frexp_f32_0_nopos_nonan(float nofpclass(pinf psub pnorm nan) %
define float @ret_frexp_f32_0_nopos_nozero(float nofpclass(pinf psub pnorm zero) %arg0) {
; CHECK-LABEL: define nofpclass(pinf zero sub pnorm) float @ret_frexp_f32_0_nopos_nozero
; CHECK-SAME: (float nofpclass(pinf zero psub pnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf zero psub pnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(pinf zero psub pnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -174,7 +174,7 @@ define float @ret_frexp_f32_0_nopos_nozero(float nofpclass(pinf psub pnorm zero)
define float @ret_frexp_f32_0_noneg_nonzero(float nofpclass(ninf nsub nnorm nzero) %arg0) {
; CHECK-LABEL: define nofpclass(ninf nzero sub nnorm) float @ret_frexp_f32_0_noneg_nonzero
; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -186,7 +186,7 @@ define float @ret_frexp_f32_0_noneg_nonzero(float nofpclass(ninf nsub nnorm nzer
define float @ret_frexp_f32_0_noneg_nonzero_nonan(float nofpclass(ninf nsub nnorm nzero nan) %arg0) {
; CHECK-LABEL: define nofpclass(nan ninf nzero sub nnorm) float @ret_frexp_f32_0_noneg_nonzero_nonan
; CHECK-SAME: (float nofpclass(nan ninf nzero nsub nnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -196,9 +196,9 @@ define float @ret_frexp_f32_0_noneg_nonzero_nonan(float nofpclass(ninf nsub nnor
}
define float @ret_frexp_f32_0_noneg(float nofpclass(ninf nsub nnorm) %arg0) {
-; CHECK-LABEL: define nofpclass(ninf sub) float @ret_frexp_f32_0_noneg
+; CHECK-LABEL: define nofpclass(ninf sub nnorm) float @ret_frexp_f32_0_noneg
; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nsub nnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nsub nnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -208,9 +208,9 @@ define float @ret_frexp_f32_0_noneg(float nofpclass(ninf nsub nnorm) %arg0) {
}
define float @ret_frexp_f32_0_noneg_nonan(float nofpclass(ninf nsub nnorm nan) %arg0) {
-; CHECK-LABEL: define nofpclass(nan ninf sub) float @ret_frexp_f32_0_noneg_nonan
+; CHECK-LABEL: define nofpclass(nan ninf sub nnorm) float @ret_frexp_f32_0_noneg_nonan
; CHECK-SAME: (float nofpclass(nan ninf nsub nnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan ninf nsub nnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(nan ninf nsub nnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -222,7 +222,7 @@ define float @ret_frexp_f32_0_noneg_nonan(float nofpclass(ninf nsub nnorm nan) %
define float @ret_frexp_f32_0_noneg_nozero(float nofpclass(ninf nsub nnorm nzero) %arg0) {
; CHECK-LABEL: define nofpclass(ninf nzero sub nnorm) float @ret_frexp_f32_0_noneg_nozero
; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]]) #[[ATTR1]] {
-; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR7]]
+; CHECK-NEXT: [[CALL:%.*]] = call { float, i32 } @llvm.frexp.f32.i32(float nofpclass(ninf nzero nsub nnorm) [[ARG0]]) #[[ATTR8]]
; CHECK-NEXT: [[CALL_0:%.*]] = extractvalue { float, i32 } [[CALL]], 0
; CHECK-NEXT: ret float [[CALL_0]]
;
@@ -234,7 +234,7 @@ define float @ret_frexp_f32_0_noneg_nozero(float nofpclass(ninf nsub nnor...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/219114
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