[llvm] [RISCV] Disable generic DAG combines at -O0 to preserve debuggability (PR #219082)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 26 21:04:01 PDT 2026


topperc wrote:

Doesn't this mean invalid immediate shift amounts won't get canonicalized. Or ANDing with all ones won't be removed. I think there might be some code in RISCVISelDAGToDAG.cpp for selecting shift+and that assume these things happened. 

https://github.com/llvm/llvm-project/pull/219082


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