[llvm] [SLP]Trim combined nodes only at their roots (PR #219095)
Alexey Bataev via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 26 20:03:01 PDT 2026
https://github.com/alexey-bataev created https://github.com/llvm/llvm-project/pull/219095
Combined subnodes were added to the trimming worklist as independent
candidates, carrying their descendants' aggregated costs. Trimming such
a subnode on its own deleted operands still referenced by the combined
root, producing instructions that no longer dominated their uses.
Skip CombinedVectorize subnodes in subtree-cost aggregation and worklist
construction so only combined roots are evaluated as trim candidates.
Fixes #218974
>From 030da424f18287c0f5c0644a1b20bd0df829d998 Mon Sep 17 00:00:00 2001
From: Alexey Bataev <a.bataev at outlook.com>
Date: Wed, 26 Aug 2026 20:02:35 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.7
---
.../Transforms/Vectorize/SLPVectorizer.cpp | 11 +-
.../X86/phi-operand-gather-insert-point.ll | 125 ++++++++++++++++++
.../X86/reassoc-flattened-copyable-operand.ll | 22 ++-
3 files changed, 145 insertions(+), 13 deletions(-)
create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gather-insert-point.ll
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 6e073a3dd12e8..e5211a198acdd 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -19517,6 +19517,10 @@ BoUpSLP::calculateTreeCostAndTrimNonProfitable(ArrayRef<Value *> VectorizedVals,
};
for (const std::unique_ptr<TreeEntry> &Ptr : VectorizableTree) {
TreeEntry &TE = *Ptr;
+ // Combined subnodes are not costed on their own, only as a whole combined
+ // node, so only the root nodes are considered.
+ if (TE.State == TreeEntry::CombinedVectorize)
+ continue;
InstructionCost C = NodesCosts.at(&TE);
InstructionCost ExtractCost = ExtractCosts.lookup(&TE);
std::get<0>(SubtreeCosts[TE.Idx]) += C + ExtractCost;
@@ -19550,8 +19554,13 @@ BoUpSLP::calculateTreeCostAndTrimNonProfitable(ArrayRef<Value *> VectorizedVals,
};
PriorityQueue<CostIndicesTy, SmallVector<CostIndicesTy>, FirstGreater>
Worklist;
- for (const auto [Idx, P] : enumerate(SubtreeCosts))
+ for (const auto [Idx, P] : enumerate(SubtreeCosts)) {
+ // Combined subnodes are not trimmed on their own, only as a whole combined
+ // node, so only the root nodes are checked and included into the worklist.
+ if (VectorizableTree[Idx]->State == TreeEntry::CombinedVectorize)
+ continue;
Worklist.emplace(VectorizableTree[Idx].get(), P);
+ }
// Narrow store trees with non-profitable immediate values - exit.
if (!UserIgnoreList && getRootNode().getVectorFactor() < MinVF &&
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gather-insert-point.ll b/llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gather-insert-point.ll
new file mode 100644
index 0000000000000..5d38d4fbdedc8
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/phi-operand-gather-insert-point.ll
@@ -0,0 +1,125 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s
+
+define void @test(i32 %a2.addr.2, i1 %loadedv20, i1 %tobool24.not) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: i32 [[A2_ADDR_2:%.*]], i1 [[LOADEDV20:%.*]], i1 [[TOBOOL24_NOT:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LBL_ENTRY:.*]]
+; CHECK: [[LBL_ENTRY]]:
+; CHECK-NEXT: [[SF13_SROA_22_0:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SF13_SROA_22_3:%.*]], %[[LBL_BR24:.*]] ]
+; CHECK-NEXT: [[SF13_SROA_20_0:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SF13_SROA_20_3:%.*]], %[[LBL_BR24]] ]
+; CHECK-NEXT: [[SF13_SROA_18_0:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SF13_SROA_18_3:%.*]], %[[LBL_BR24]] ]
+; CHECK-NEXT: [[SF13_SROA_16_0:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SF13_SROA_16_3:%.*]], %[[LBL_BR24]] ]
+; CHECK-NEXT: br i1 true, label %[[LBL_SW_DEF8:.*]], label %[[LBL_BR31:.*]]
+; CHECK: [[LBL_SW_DEF8]]:
+; CHECK-NEXT: [[SF13_SROA_22_1:%.*]] = phi i8 [ [[SF13_SROA_22_0]], %[[LBL_ENTRY]] ], [ 0, %[[LBL_BR10:.*]] ]
+; CHECK-NEXT: [[SF13_SROA_20_1:%.*]] = phi i8 [ [[SF13_SROA_20_0]], %[[LBL_ENTRY]] ], [ 0, %[[LBL_BR10]] ]
+; CHECK-NEXT: [[SF13_SROA_18_1:%.*]] = phi i8 [ [[SF13_SROA_18_0]], %[[LBL_ENTRY]] ], [ [[SF13_SROA_18_2:%.*]], %[[LBL_BR10]] ]
+; CHECK-NEXT: [[SF13_SROA_16_1:%.*]] = phi i8 [ [[SF13_SROA_16_0]], %[[LBL_ENTRY]] ], [ 1, %[[LBL_BR10]] ]
+; CHECK-NEXT: br label %[[LBL_BR10]]
+; CHECK: [[LBL_BR10]]:
+; CHECK-NEXT: [[SF13_SROA_22_2:%.*]] = phi i8 [ [[SF13_SROA_22_1]], %[[LBL_SW_DEF8]] ], [ [[A1_SROA_16_11_EXTRACT_TRUNC:%.*]], %[[IF_END22:.*]] ]
+; CHECK-NEXT: [[SF13_SROA_20_2:%.*]] = phi i8 [ [[SF13_SROA_20_1]], %[[LBL_SW_DEF8]] ], [ [[A1_SROA_16_10_EXTRACT_TRUNC:%.*]], %[[IF_END22]] ]
+; CHECK-NEXT: [[SF13_SROA_18_2]] = phi i8 [ [[SF13_SROA_18_1]], %[[LBL_SW_DEF8]] ], [ [[A1_SROA_16_9_EXTRACT_TRUNC:%.*]], %[[IF_END22]] ]
+; CHECK-NEXT: [[SF13_SROA_16_2:%.*]] = phi i8 [ [[SF13_SROA_16_1]], %[[LBL_SW_DEF8]] ], [ [[A1_SROA_16_8_EXTRACT_TRUNC:%.*]], %[[IF_END22]] ]
+; CHECK-NEXT: switch i32 [[A2_ADDR_2]], label %[[LBL_BR24]] [
+; CHECK-NEXT: i32 7, label %[[LBL_SW_DEF8]]
+; CHECK-NEXT: i32 1, label %[[LBL_SW16:.*]]
+; CHECK-NEXT: ]
+; CHECK: [[LBL_SW16]]:
+; CHECK-NEXT: [[A1_SROA_16_9_INSERT_EXT:%.*]] = zext i8 [[SF13_SROA_18_2]] to i32
+; CHECK-NEXT: [[A1_SROA_16_9_INSERT_SHIFT:%.*]] = shl i32 [[A1_SROA_16_9_INSERT_EXT]], 8
+; CHECK-NEXT: [[A1_SROA_16_8_INSERT_EXT:%.*]] = zext i8 [[SF13_SROA_16_2]] to i32
+; CHECK-NEXT: [[A1_SROA_16_9_INSERT_INSERT:%.*]] = or i32 [[A1_SROA_16_9_INSERT_SHIFT]], [[A1_SROA_16_8_INSERT_EXT]]
+; CHECK-NEXT: [[A1_SROA_16_10_INSERT_EXT:%.*]] = zext i8 [[SF13_SROA_20_2]] to i32
+; CHECK-NEXT: [[A1_SROA_16_10_INSERT_SHIFT:%.*]] = shl i32 [[A1_SROA_16_10_INSERT_EXT]], 16
+; CHECK-NEXT: [[A1_SROA_16_10_INSERT_INSERT:%.*]] = or i32 [[A1_SROA_16_9_INSERT_INSERT]], [[A1_SROA_16_10_INSERT_SHIFT]]
+; CHECK-NEXT: [[A1_SROA_16_11_INSERT_EXT:%.*]] = zext i8 [[SF13_SROA_22_2]] to i32
+; CHECK-NEXT: [[A1_SROA_16_11_INSERT_SHIFT:%.*]] = shl i32 [[A1_SROA_16_11_INSERT_EXT]], 24
+; CHECK-NEXT: [[A1_SROA_16_11_INSERT_INSERT:%.*]] = or i32 [[A1_SROA_16_10_INSERT_INSERT]], [[A1_SROA_16_11_INSERT_SHIFT]]
+; CHECK-NEXT: br label %[[LBL_BR24]]
+; CHECK: [[LBL_BR24]]:
+; CHECK-NEXT: [[SF13_SROA_22_3]] = phi i8 [ [[SF13_SROA_22_2]], %[[LBL_SW16]] ], [ [[SF13_SROA_22_4:%.*]], %[[LBL_BR31]] ], [ 1, %[[LBL_BR10]] ]
+; CHECK-NEXT: [[SF13_SROA_20_3]] = phi i8 [ [[SF13_SROA_20_2]], %[[LBL_SW16]] ], [ [[SF13_SROA_20_4:%.*]], %[[LBL_BR31]] ], [ 1, %[[LBL_BR10]] ]
+; CHECK-NEXT: [[SF13_SROA_18_3]] = phi i8 [ 1, %[[LBL_SW16]] ], [ [[SF13_SROA_18_4:%.*]], %[[LBL_BR31]] ], [ 0, %[[LBL_BR10]] ]
+; CHECK-NEXT: [[SF13_SROA_16_3]] = phi i8 [ [[SF13_SROA_16_2]], %[[LBL_SW16]] ], [ [[SF13_SROA_16_4:%.*]], %[[LBL_BR31]] ], [ 0, %[[LBL_BR10]] ]
+; CHECK-NEXT: [[A1_SROA_16_44:%.*]] = phi i32 [ [[A1_SROA_16_11_INSERT_INSERT]], %[[LBL_SW16]] ], [ 0, %[[LBL_BR31]] ], [ 0, %[[LBL_BR10]] ]
+; CHECK-NEXT: br i1 [[LOADEDV20]], label %[[LBL_ENTRY]], label %[[IF_END22]]
+; CHECK: [[IF_END22]]:
+; CHECK-NEXT: [[A1_SROA_16_8_EXTRACT_TRUNC]] = trunc i32 [[A1_SROA_16_44]] to i8
+; CHECK-NEXT: [[A1_SROA_16_9_EXTRACT_SHIFT:%.*]] = lshr i32 [[A1_SROA_16_44]], 1
+; CHECK-NEXT: [[A1_SROA_16_9_EXTRACT_TRUNC]] = trunc i32 [[A1_SROA_16_9_EXTRACT_SHIFT]] to i8
+; CHECK-NEXT: [[A1_SROA_16_10_EXTRACT_TRUNC]] = trunc i32 [[A2_ADDR_2]] to i8
+; CHECK-NEXT: [[A1_SROA_16_11_EXTRACT_TRUNC]] = trunc i32 [[A2_ADDR_2]] to i8
+; CHECK-NEXT: br i1 [[TOBOOL24_NOT]], label %[[LBL_BR31]], label %[[LBL_BR10]]
+; CHECK: [[LBL_BR31]]:
+; CHECK-NEXT: [[SF13_SROA_22_4]] = phi i8 [ [[A1_SROA_16_11_EXTRACT_TRUNC]], %[[IF_END22]] ], [ 0, %[[LBL_ENTRY]] ]
+; CHECK-NEXT: [[SF13_SROA_20_4]] = phi i8 [ [[A1_SROA_16_10_EXTRACT_TRUNC]], %[[IF_END22]] ], [ 0, %[[LBL_ENTRY]] ]
+; CHECK-NEXT: [[SF13_SROA_18_4]] = phi i8 [ [[SF13_SROA_20_3]], %[[IF_END22]] ], [ 0, %[[LBL_ENTRY]] ]
+; CHECK-NEXT: [[SF13_SROA_16_4]] = phi i8 [ [[SF13_SROA_22_3]], %[[IF_END22]] ], [ 0, %[[LBL_ENTRY]] ]
+; CHECK-NEXT: br label %[[LBL_BR24]]
+;
+entry:
+ br label %lbl_entry
+
+lbl_entry:
+ %sf13.sroa.22.0 = phi i8 [ 0, %entry ], [ %sf13.sroa.22.3, %lbl_br24 ]
+ %sf13.sroa.20.0 = phi i8 [ 0, %entry ], [ %sf13.sroa.20.3, %lbl_br24 ]
+ %sf13.sroa.18.0 = phi i8 [ 0, %entry ], [ %sf13.sroa.18.3, %lbl_br24 ]
+ %sf13.sroa.16.0 = phi i8 [ 0, %entry ], [ %sf13.sroa.16.3, %lbl_br24 ]
+ br i1 true, label %lbl_sw_def8, label %lbl_br31
+
+lbl_sw_def8:
+ %sf13.sroa.22.1 = phi i8 [ %sf13.sroa.22.0, %lbl_entry ], [ 0, %lbl_br10 ]
+ %sf13.sroa.20.1 = phi i8 [ %sf13.sroa.20.0, %lbl_entry ], [ 0, %lbl_br10 ]
+ %sf13.sroa.18.1 = phi i8 [ %sf13.sroa.18.0, %lbl_entry ], [ %sf13.sroa.18.2, %lbl_br10 ]
+ %sf13.sroa.16.1 = phi i8 [ %sf13.sroa.16.0, %lbl_entry ], [ 1, %lbl_br10 ]
+ br label %lbl_br10
+
+lbl_br10:
+ %sf13.sroa.22.2 = phi i8 [ %sf13.sroa.22.1, %lbl_sw_def8 ], [ %a1.sroa.16.11.extract.trunc, %if.end22 ]
+ %sf13.sroa.20.2 = phi i8 [ %sf13.sroa.20.1, %lbl_sw_def8 ], [ %a1.sroa.16.10.extract.trunc, %if.end22 ]
+ %sf13.sroa.18.2 = phi i8 [ %sf13.sroa.18.1, %lbl_sw_def8 ], [ %a1.sroa.16.9.extract.trunc, %if.end22 ]
+ %sf13.sroa.16.2 = phi i8 [ %sf13.sroa.16.1, %lbl_sw_def8 ], [ %a1.sroa.16.8.extract.trunc, %if.end22 ]
+ switch i32 %a2.addr.2, label %lbl_br24 [
+ i32 7, label %lbl_sw_def8
+ i32 1, label %lbl_sw16
+ ]
+
+lbl_sw16:
+ %a1.sroa.16.9.insert.ext = zext i8 %sf13.sroa.18.2 to i32
+ %a1.sroa.16.9.insert.shift = shl i32 %a1.sroa.16.9.insert.ext, 8
+ %a1.sroa.16.8.insert.ext = zext i8 %sf13.sroa.16.2 to i32
+ %a1.sroa.16.9.insert.insert = or i32 %a1.sroa.16.9.insert.shift, %a1.sroa.16.8.insert.ext
+ %a1.sroa.16.10.insert.ext = zext i8 %sf13.sroa.20.2 to i32
+ %a1.sroa.16.10.insert.shift = shl i32 %a1.sroa.16.10.insert.ext, 16
+ %a1.sroa.16.10.insert.insert = or i32 %a1.sroa.16.9.insert.insert, %a1.sroa.16.10.insert.shift
+ %a1.sroa.16.11.insert.ext = zext i8 %sf13.sroa.22.2 to i32
+ %a1.sroa.16.11.insert.shift = shl i32 %a1.sroa.16.11.insert.ext, 24
+ %a1.sroa.16.11.insert.insert = or i32 %a1.sroa.16.10.insert.insert, %a1.sroa.16.11.insert.shift
+ br label %lbl_br24
+
+lbl_br24:
+ %sf13.sroa.22.3 = phi i8 [ %sf13.sroa.22.2, %lbl_sw16 ], [ %sf13.sroa.22.4, %lbl_br31 ], [ 1, %lbl_br10 ]
+ %sf13.sroa.20.3 = phi i8 [ %sf13.sroa.20.2, %lbl_sw16 ], [ %sf13.sroa.20.4, %lbl_br31 ], [ 1, %lbl_br10 ]
+ %sf13.sroa.18.3 = phi i8 [ 1, %lbl_sw16 ], [ %sf13.sroa.18.4, %lbl_br31 ], [ 0, %lbl_br10 ]
+ %sf13.sroa.16.3 = phi i8 [ %sf13.sroa.16.2, %lbl_sw16 ], [ %sf13.sroa.16.4, %lbl_br31 ], [ 0, %lbl_br10 ]
+ %a1.sroa.16.44 = phi i32 [ %a1.sroa.16.11.insert.insert, %lbl_sw16 ], [ 0, %lbl_br31 ], [ 0, %lbl_br10 ]
+ br i1 %loadedv20, label %lbl_entry, label %if.end22
+
+if.end22:
+ %a1.sroa.16.8.extract.trunc = trunc i32 %a1.sroa.16.44 to i8
+ %a1.sroa.16.9.extract.shift = lshr i32 %a1.sroa.16.44, 1
+ %a1.sroa.16.9.extract.trunc = trunc i32 %a1.sroa.16.9.extract.shift to i8
+ %a1.sroa.16.10.extract.trunc = trunc i32 %a2.addr.2 to i8
+ %a1.sroa.16.11.extract.trunc = trunc i32 %a2.addr.2 to i8
+ br i1 %tobool24.not, label %lbl_br31, label %lbl_br10
+
+lbl_br31:
+ %sf13.sroa.22.4 = phi i8 [ %a1.sroa.16.11.extract.trunc, %if.end22 ], [ 0, %lbl_entry ]
+ %sf13.sroa.20.4 = phi i8 [ %a1.sroa.16.10.extract.trunc, %if.end22 ], [ 0, %lbl_entry ]
+ %sf13.sroa.18.4 = phi i8 [ %sf13.sroa.20.3, %if.end22 ], [ 0, %lbl_entry ]
+ %sf13.sroa.16.4 = phi i8 [ %sf13.sroa.22.3, %if.end22 ], [ 0, %lbl_entry ]
+ br label %lbl_br24
+}
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll b/llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
index 91368f5b80ead..585bfa7717094 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
@@ -14,29 +14,27 @@ define void @test(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7
; CHECK-NEXT: [[TMP51:%.*]] = fmul fast double [[TMP8]], [[TMP10]]
; CHECK-NEXT: [[TMP52:%.*]] = fmul fast double [[TMP8]], [[TMP9]]
; CHECK-NEXT: [[TMP53:%.*]] = fneg fast double [[TMP25]]
+; CHECK-NEXT: [[TMP62:%.*]] = fmul fast double [[TMP13]], [[TMP51]]
; CHECK-NEXT: [[TMP54:%.*]] = fadd fast double [[TMP51]], 1.000000e+00
+; CHECK-NEXT: [[TMP61:%.*]] = fmul fast double [[TMP13]], [[TMP52]]
; CHECK-NEXT: [[TMP55:%.*]] = fmul fast double [[TMP48]], [[TMP40]]
; CHECK-NEXT: [[TMP56:%.*]] = fmul fast double [[TMP36]], [[TMP46]]
; CHECK-NEXT: [[TMP57:%.*]] = fmul fast double [[TMP32]], [[TMP40]]
; CHECK-NEXT: [[TMP58:%.*]] = fmul fast double [[TMP39]], [[TMP40]]
; CHECK-NEXT: [[TMP59:%.*]] = fadd fast double [[TMP56]], 1.000000e+00
-; CHECK-NEXT: [[TMP60:%.*]] = fmul fast double [[TMP24]], [[TMP53]]
-; CHECK-NEXT: [[TMP61:%.*]] = fmul fast double [[TMP13]], [[TMP51]]
-; CHECK-NEXT: [[TMP62:%.*]] = fmul fast double [[TMP13]], [[TMP52]]
; CHECK-NEXT: [[TMP63:%.*]] = fmul fast double [[TMP36]], [[TMP62]]
; CHECK-NEXT: [[TMP64:%.*]] = fmul fast double [[TMP36]], [[TMP61]]
-; CHECK-NEXT: [[TMP65:%.*]] = fmul fast double [[TMP45]], [[TMP62]]
-; CHECK-NEXT: [[TMP66:%.*]] = insertelement <2 x double> poison, double [[TMP65]], i64 0
-; CHECK-NEXT: [[TMP67:%.*]] = insertelement <2 x double> [[TMP66]], double [[TMP64]], i64 1
-; CHECK-NEXT: [[TMP68:%.*]] = fadd fast <2 x double> [[TMP67]], <double -0.000000e+00, double 2.000000e+00>
-; CHECK-NEXT: [[TMP69:%.*]] = fsub fast double [[TMP63]], [[TMP59]]
+; CHECK-NEXT: [[TMP60:%.*]] = fmul fast double [[TMP24]], [[TMP53]]
+; CHECK-NEXT: [[TMP65:%.*]] = fadd fast double [[TMP63]], 2.000000e+00
+; CHECK-NEXT: [[TMP66:%.*]] = fmul fast double [[TMP45]], [[TMP61]]
+; CHECK-NEXT: [[TMP69:%.*]] = fsub fast double [[TMP64]], [[TMP59]]
; CHECK-NEXT: [[TMP70:%.*]] = insertelement <4 x double> poison, double [[TMP69]], i64 0
-; CHECK-NEXT: [[TMP71:%.*]] = shufflevector <2 x double> [[TMP68]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
-; CHECK-NEXT: [[TMP72:%.*]] = shufflevector <4 x double> [[TMP70]], <4 x double> [[TMP71]], <4 x i32> <i32 0, i32 4, i32 5, i32 poison>
+; CHECK-NEXT: [[TMP71:%.*]] = insertelement <4 x double> [[TMP70]], double [[TMP66]], i64 1
+; CHECK-NEXT: [[TMP72:%.*]] = insertelement <4 x double> [[TMP71]], double [[TMP65]], i64 2
; CHECK-NEXT: [[TMP73:%.*]] = insertelement <4 x double> [[TMP72]], double [[TMP60]], i64 3
; CHECK-NEXT: [[TMP74:%.*]] = insertelement <4 x double> poison, double [[TMP47]], i64 0
; CHECK-NEXT: [[TMP75:%.*]] = insertelement <4 x double> [[TMP74]], double [[TMP55]], i64 1
-; CHECK-NEXT: [[TMP76:%.*]] = insertelement <4 x double> [[TMP75]], double [[TMP62]], i64 2
+; CHECK-NEXT: [[TMP76:%.*]] = insertelement <4 x double> [[TMP75]], double [[TMP61]], i64 2
; CHECK-NEXT: [[TMP77:%.*]] = insertelement <4 x double> [[TMP76]], double [[TMP54]], i64 3
; CHECK-NEXT: [[TMP78:%.*]] = fadd fast <4 x double> [[TMP73]], [[TMP77]]
; CHECK-NEXT: [[TMP79:%.*]] = fsub fast <4 x double> [[TMP73]], [[TMP77]]
@@ -46,7 +44,7 @@ define void @test(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7
; CHECK-NEXT: [[TMP83:%.*]] = insertelement <8 x double> poison, double [[TMP35]], i64 0
; CHECK-NEXT: [[TMP84:%.*]] = insertelement <8 x double> [[TMP83]], double [[TMP82]], i64 1
; CHECK-NEXT: [[TMP85:%.*]] = insertelement <8 x double> [[TMP84]], double [[TMP81]], i64 2
-; CHECK-NEXT: [[TMP86:%.*]] = insertelement <8 x double> [[TMP85]], double [[TMP61]], i64 3
+; CHECK-NEXT: [[TMP86:%.*]] = insertelement <8 x double> [[TMP85]], double [[TMP62]], i64 3
; CHECK-NEXT: [[TMP87:%.*]] = shufflevector <4 x double> [[TMP80]], <4 x double> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT: [[TMP88:%.*]] = shufflevector <8 x double> [[TMP86]], <8 x double> [[TMP87]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
; CHECK-NEXT: [[TMP89:%.*]] = insertelement <8 x double> <double 1.000000e+00, double poison, double 1.000000e+00, double poison, double 1.000000e+00, double 1.000000e+00, double poison, double poison>, double [[TMP27]], i64 1
More information about the llvm-commits
mailing list