[llvm] [SPIR-V] Erase all instructions after OpKill, not just the next one (PR #219022)
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Wed Aug 26 12:52:27 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-spir-v
Author: Arseniy Obolenskiy (aobolensk)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/219022.diff
2 Files Affected:
- (modified) llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp (+5-3)
- (modified) llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll (+26)
``````````diff
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
index f3f9984190de5..1607583611e82 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
@@ -4483,9 +4483,11 @@ bool SPIRVInstructionSelector::selectDiscard(Register ResVReg,
} else {
Opcode = SPIRV::OpKill;
// OpKill must be the last operation of any basic block.
- if (MachineInstr *NextI = I.getNextNode()) {
- GR.invalidateMachineInstr(NextI);
- NextI->eraseFromParent();
+ for (MachineInstr *NextI = I.getNextNode(); NextI;) {
+ MachineInstr *ToErase = NextI;
+ NextI = NextI->getNextNode();
+ GR.invalidateMachineInstr(ToErase);
+ ToErase->eraseFromParent();
}
}
diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
index 39be59bbc7332..fb13464010115 100644
--- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
@@ -47,6 +47,32 @@ end: ; preds = %lt0, %entry
}
declare void @llvm.spv.discard()
+define void @test_scalar_multi_instr_after_discard(float noundef %Buf, ptr %Out) {
+entry:
+; CHECK-LABEL: ; -- Begin function test_scalar_multi_instr_after_discard
+; CHECK: OpBranchConditional %[[#]] %[[#truel:]] %[[#endl:]]
+; CHECK: %[[#truel]] = OpLabel
+; SPIRV15: OpKill
+; SPIRV15-NOT: OpStore
+; SPIRV16: OpDemoteToHelperInvocation
+; SPIRV16: OpBranch %[[#endl]]
+; CHECK: %[[#endl]] = OpLabel
+ %Buf.addr = alloca float, align 4
+ store float %Buf, ptr %Buf.addr, align 4
+ %1 = load float, ptr %Buf.addr, align 4
+ %2 = fcmp olt float %1, 0.000000e+00
+ br i1 %2, label %lt0, label %end
+
+lt0: ; preds = %entry
+ call void @llvm.spv.discard()
+ store volatile float 1.0, ptr %Out, align 4
+ store volatile float 2.0, ptr %Out, align 4
+ br label %end
+
+end: ; preds = %lt0, %entry
+ ret void
+}
+
define void @test_vector(<4 x float> noundef %Buf) {
entry:
; CHECK-LABEL: ; -- Begin function test_vector
``````````
</details>
https://github.com/llvm/llvm-project/pull/219022
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