[llvm] [X86] Add TuningSlowPDEP/PEXT flags and control vector PDEP/PEXT scalarization with them (PR #218980)

[via llvm-commits]

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@@ -350,30 +522,109 @@ define <8 x i32> @pext_v8i32(<8 x i32> %val, <8 x i32> %mask) nounwind {
 }
 
 define <4 x i64> @pext_v4i64(<4 x i64> %val, <4 x i64> %mask) nounwind {
-; AVX2-LABEL: pext_v4i64:
-; AVX2:       # %bb.0:
-; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
-; AVX2-NEXT:    vpextrq $1, %xmm2, %rax
-; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm3
-; AVX2-NEXT:    vpextrq $1, %xmm3, %rcx
-; AVX2-NEXT:    pextq %rax, %rcx, %rax
-; AVX2-NEXT:    vmovq %rax, %xmm4
-; AVX2-NEXT:    vmovq %xmm2, %rax
-; AVX2-NEXT:    vmovq %xmm3, %rcx
-; AVX2-NEXT:    pextq %rax, %rcx, %rax
-; AVX2-NEXT:    vmovq %rax, %xmm2
-; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
-; AVX2-NEXT:    vpextrq $1, %xmm1, %rax
-; AVX2-NEXT:    vpextrq $1, %xmm0, %rcx
-; AVX2-NEXT:    pextq %rax, %rcx, %rax
-; AVX2-NEXT:    vmovq %rax, %xmm3
-; AVX2-NEXT:    vmovq %xmm1, %rax
-; AVX2-NEXT:    vmovq %xmm0, %rcx
-; AVX2-NEXT:    pextq %rax, %rcx, %rax
-; AVX2-NEXT:    vmovq %rax, %xmm0
-; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
-; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
-; AVX2-NEXT:    retq
+; AVX2-FAST-LABEL: pext_v4i64:
+; AVX2-FAST:       # %bb.0:
+; AVX2-FAST-NEXT:    vextracti128 $1, %ymm1, %xmm2
+; AVX2-FAST-NEXT:    vpextrq $1, %xmm2, %rax
+; AVX2-FAST-NEXT:    vextracti128 $1, %ymm0, %xmm3
+; AVX2-FAST-NEXT:    vpextrq $1, %xmm3, %rcx
+; AVX2-FAST-NEXT:    pextq %rax, %rcx, %rax
+; AVX2-FAST-NEXT:    vmovq %rax, %xmm4
+; AVX2-FAST-NEXT:    vmovq %xmm2, %rax
+; AVX2-FAST-NEXT:    vmovq %xmm3, %rcx
+; AVX2-FAST-NEXT:    pextq %rax, %rcx, %rax
+; AVX2-FAST-NEXT:    vmovq %rax, %xmm2
+; AVX2-FAST-NEXT:    vpunpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
+; AVX2-FAST-NEXT:    vpextrq $1, %xmm1, %rax
+; AVX2-FAST-NEXT:    vpextrq $1, %xmm0, %rcx
+; AVX2-FAST-NEXT:    pextq %rax, %rcx, %rax
+; AVX2-FAST-NEXT:    vmovq %rax, %xmm3
+; AVX2-FAST-NEXT:    vmovq %xmm1, %rax
+; AVX2-FAST-NEXT:    vmovq %xmm0, %rcx
+; AVX2-FAST-NEXT:    pextq %rax, %rcx, %rax
+; AVX2-FAST-NEXT:    vmovq %rax, %xmm0
+; AVX2-FAST-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
+; AVX2-FAST-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX2-FAST-NEXT:    retq
+;
+; AVX2-SLOW-LABEL: pext_v4i64:
+; AVX2-SLOW:       # %bb.0:
+; AVX2-SLOW-NEXT:    vpcmpeqd %ymm2, %ymm2, %ymm2
+; AVX2-SLOW-NEXT:    vpxor %ymm2, %ymm1, %ymm2
+; AVX2-SLOW-NEXT:    vpaddq %ymm2, %ymm2, %ymm3
+; AVX2-SLOW-NEXT:    movq $-1, %rax
+; AVX2-SLOW-NEXT:    vmovq %rax, %xmm2
+; AVX2-SLOW-NEXT:    vpbroadcastq %xmm2, %ymm2
+; AVX2-SLOW-NEXT:    vpclmulqdq $1, %ymm2, %ymm3, %ymm4
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Andarwinux wrote:

This doesn't match reality. cpu with slow-pext have no vpclmulqdq, so the actual sequence will be longer than this.

https://github.com/llvm/llvm-project/pull/218980