[llvm] [AMDGPU] Model ordered XDL writes in expert scheduling (PR #218326)

[Jay Foad via llvm-commits]

================
@@ -884,14 +903,26 @@ void WaitcntBrackets::updateByEvent(HWEvents E, MachineInstr &Inst) {
     Increment = 2;
   }
   unsigned CurrScore = UB + Increment;
-  if (CurrScore == 0)
+  // Increment can be two, so unsigned overflow may wrap to one instead of zero.
+  if (CurrScore <= UB)
     report_fatal_error("InsertWaitcnt score wraparound");
   // PendingEvents and ScoreUB need to be update regardless if this event
   // changes the score of a register or not.
   // Examples including vm_cnt when buffer-store or lgkm_cnt when send-message.
   PendingEvents |= E;
   setScoreUB(T, CurrScore);
 
+  if (E == HWEvents::VGPR_XDL_WRITE && Context->TII.isVAVDSTOrderedXDL(Inst)) {
+    // While an earlier write is pending, every later ordered XDL write must
+    // also be pending. Count those writes as a per-dependency wait bound.
+    for (auto &Entry : VMem) {
----------------
jayfoad wrote:

Looping over all of VMem for each instruction is potentially expensive so this pass generally does not do that. Can you use some monotonically increasing count of XDL instruction instead, just like the way regular VGPR/SGPR scores work?

https://github.com/llvm/llvm-project/pull/218326