[llvm] [AMDGPU] Fix uniform fcopysign pattern (PR #218644)

[via llvm-commits]

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@@ -2476,6 +2476,21 @@ def : GCNPat <
 >;
 }
 let True16Predicate = UseRealTrue16Insts in {
+// Uniform true16 values use SReg_32. Copy them to VGPR_16 before packing so
+// subregister liveness tracks the source lane in the correct coordinates.
+let AddedComplexity = 1 in
+def : GCNPat <
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Shoreshen wrote:

Hi @jayfoad applied, 2 case used 1 more register, others are not changed:
<img width="2588" height="299" alt="image" src="https://github.com/user-attachments/assets/8be3b733-3554-415c-8435-d5a2f4ae830d" />

https://github.com/llvm/llvm-project/pull/218644