[llvm] [CodeGenPrepare] don't promote sdiv/srem by -1 (PR #218737)

via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 25 21:06:03 PDT 2026


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@@ -8349,6 +8349,18 @@ class VectorPromoteHelper {
     llvm_unreachable(nullptr);
   }
 
+  static bool
+  canCauseUndefinedBehaviorOnUnobservedLanes(const Instruction *Use) {
+    switch (Use->getOpcode()) {
+    default:
+      return false;
+    case Instruction::SDiv:
+    case Instruction::SRem:
+      return isa<ConstantInt>(Use->getOperand(1)) &&
+             cast<ConstantInt>(Use->getOperand(1))->isMinusOne();
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im-lunex wrote:

hmm i see so in here i tried a more minimal approach. cuz the previous one was a bit buggy and also can cause problems in future development.. by far the new commit will have a much more minimal and native fix.. for this issue

in the new approach i used LLVM's `speculative-execution safety check` (`isSafeToSpeculativelyExecute`) and this should be the more stranded approach

https://github.com/llvm/llvm-project/pull/218737


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