[llvm] [BOLT][RISCV] Fix AUIPC/JALR call rewriting (PR #216882)

[via llvm-commits]

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+// Test signed target reconstruction, JALR target-bit clearing, tail calls,
+// and rejection of AUIPC/JALR near matches without relocations.
+
+// RUN: llvm-mc -triple riscv64 -mattr=-relax -filetype=obj -o %t.o %s
+// RUN: ld.lld --no-relax --emit-relocs -e backward_target -o %t %t.o
+// RUN: llvm-bolt --print-cfg --print-fix-riscv-calls \
+// RUN:     --print-only=backward_tail --print-only=odd_call \
+// RUN:     --print-only=near_matches --reorder-functions=user \
+// RUN:     --function-order=%p/Inputs/unsymbolized-call-edge-order.txt \
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Thrrreeee wrote:

same as above

https://github.com/llvm/llvm-project/pull/216882