[llvm] [AMDGPU] Model ordered XDL writes in expert scheduling (PR #218326)

[via llvm-commits]

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@@ -0,0 +1,511 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1250 -verify-machineinstrs -amdgpu-expert-scheduling-mode -run-pass si-insert-waitcnts %s -o - | FileCheck %s
+
+---
+name: mixed_events_use_ordered_xdl_fence_bound
+tracksRegLiveness: true
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vporpo wrote:

do we need tracksRegLiveness = true? It makes the tests quite verbose.

https://github.com/llvm/llvm-project/pull/218326