[llvm] f008148 - [AMDGPU] Fix undef uses miscounted as kills in SIOptimizeVGPRLiveRange (#218342)

[via llvm-commits]

Author: Arseniy Obolenskiy
Date: 2026-08-24T19:17:11Z
New Revision: f0081485f72e8b9fbb25deda5b7a0c627e8c8f4f

URL: https://github.com/llvm/llvm-project/commit/f0081485f72e8b9fbb25deda5b7a0c627e8c8f4f
DIFF: https://github.com/llvm/llvm-project/commit/f0081485f72e8b9fbb25deda5b7a0c627e8c8f4f.diff

LOG: [AMDGPU] Fix undef uses miscounted as kills in SIOptimizeVGPRLiveRange (#218342)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
    llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
index bd51ccc2dea78..b682b439a241e 100644
--- a/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+++ b/llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
@@ -220,7 +220,8 @@ void SIOptimizeVGPRLiveRange::findNonPHIUsesInBlock(
     Register Reg, MachineBasicBlock *MBB,
     SmallVectorImpl<MachineInstr *> &Uses) const {
   for (auto &UseMI : MRI->use_nodbg_instructions(Reg)) {
-    if (UseMI.getParent() == MBB && !UseMI.isPHI())
+    if (UseMI.getParent() == MBB && !UseMI.isPHI() &&
+        UseMI.readsVirtualRegister(Reg))
       Uses.push_back(&UseMI);
   }
 }

diff  --git a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
index f665efba1e1a3..23484ddef17ab 100644
--- a/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
+++ b/llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
@@ -18,7 +18,7 @@ body:             |
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vreg_64 = COPY killed [[REG_SEQUENCE]]
   ; CHECK-NEXT:   [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[V_CMP_NE_U32_e64_]], %bb.3, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
   ; CHECK-NEXT:   S_BRANCH %bb.2
   ; CHECK-NEXT: {{  $}}