[llvm] [X86] Lower bf16->f32/f64 fpext without a GPR round-trip (PR #218359)

[Phoebe Wang via llvm-commits]

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@@ -22973,6 +22978,39 @@ static SDValue LowerFP_TO_FP16(SDValue Op, SelectionDAG &DAG) {
   return Res;
 }
 
+SDValue X86TargetLowering::LowerBF16_TO_FP(SDValue Op,
+                                           SelectionDAG &DAG) const {
+  SDLoc DL(Op);
+  SDValue Src = Op.getOperand(0);
+  // Operand is usually already softened to i16 by type legalization.
+  if (Src.getValueType() == MVT::bf16)
+    Src = DAG.getBitcast(MVT::i16, Src);
+  else
+    Src = DAG.getAnyExtOrTrunc(Src, DL, MVT::i16);
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phoebewang wrote:

Is there any case trigger the else case?

https://github.com/llvm/llvm-project/pull/218359