[llvm] [BOLT][RISCV] Precommit test for a call that links through t0 (PR #218396)
Kito Cheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 24 06:08:23 PDT 2026
https://github.com/kito-cheng updated https://github.com/llvm/llvm-project/pull/218396
>From 710380d1211cb641fa7ebb98b6165ccfdfbaee45 Mon Sep 17 00:00:00 2001
From: Kito Cheng <kito.cheng at sifive.com>
Date: Mon, 17 Aug 2026 23:29:39 +0800
Subject: [PATCH 1/2] [BOLT][RISCV] Precommit test for a call that links
through t0
The machine outliner calls its outlined functions with "call t0, func" and
the callee returns with "jr t0". BOLT currently rewrites that call to link
through ra, which the CHECK lines below pin down.
---
bolt/test/RISCV/call-link-register.s | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 bolt/test/RISCV/call-link-register.s
diff --git a/bolt/test/RISCV/call-link-register.s b/bolt/test/RISCV/call-link-register.s
new file mode 100644
index 0000000000000..50288e3bd31d3
--- /dev/null
+++ b/bolt/test/RISCV/call-link-register.s
@@ -0,0 +1,24 @@
+// RUN: %clang %cflags64 -Wl,--no-relax -o %t %s
+// RUN: llvm-bolt -o %t.bolt %t
+// RUN: llvm-objdump -d --disassemble-symbols=_start %t.bolt | FileCheck %s
+
+ .text
+
+ .globl _start
+ .p2align 1
+_start:
+// CHECK-LABEL: <_start>:
+/// The auipc of the pair, replaced by a nop once the call is rewritten.
+// CHECK-NEXT: nop
+/// FIXME: the link register is dropped here: the call is rewritten to link
+/// through ra, so f returns to whatever t0 happens to hold.
+// CHECK-NEXT: jal 0x{{.*}} <f>
+ call t0, f
+ ret
+ .size _start, .-_start
+
+ .globl f
+ .p2align 1
+f:
+ jr t0
+ .size f, .-f
>From b657787cff66a055455699e72e8a889cd9664968 Mon Sep 17 00:00:00 2001
From: Kito Cheng <kito.cheng at sifive.com>
Date: Mon, 24 Aug 2026 21:05:09 +0800
Subject: [PATCH 2/2] fixup! [BOLT][RISCV] Precommit test for a call that links
through t0
---
bolt/test/RISCV/call-link-register.s | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/bolt/test/RISCV/call-link-register.s b/bolt/test/RISCV/call-link-register.s
index 50288e3bd31d3..f31195b00d8a1 100644
--- a/bolt/test/RISCV/call-link-register.s
+++ b/bolt/test/RISCV/call-link-register.s
@@ -14,6 +14,16 @@ _start:
/// through ra, so f returns to whatever t0 happens to hold.
// CHECK-NEXT: jal 0x{{.*}} <f>
call t0, f
+/// A jal in direct range is rewritten on its own, with no auipc to nop out.
+/// FIXME: the link register is dropped here too.
+// CHECK-NEXT: jal 0x{{.*}} <f>
+ jal t0, f
+/// A call that already links through ra keeps ra.
+// CHECK-NEXT: nop
+// CHECK-NEXT: jal 0x{{.*}} <f>
+ call f
+// CHECK-NEXT: jal 0x{{.*}} <f>
+ jal ra, f
ret
.size _start, .-_start
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