[llvm] RISCV: Fix VLOptimizer null dereference on an undef slide amount (PR #218329)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/218329

Also since this is an SSA pass, switch from getUniqueVRegDef
to regular getVRegDef.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)

>From 9238a0c2979c1869d60086d1c252f7d5675f957e Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sun, 23 Aug 2026 23:46:19 +0200
Subject: [PATCH] RISCV: Fix VLOptimizer null dereference on an undef slide
 amount

Also since this is an SSA pass, switch from getUniqueVRegDef
to regular getVRegDef.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)
---
 llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp      |  4 ++--
 llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir | 14 +++++++++++++-
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
index 24f25107073b9..c26f3adfdb085 100644
--- a/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+++ b/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
@@ -1044,8 +1044,8 @@ getMinimumVLForVSLIDEDOWN_VX(const MachineOperand &UserOp,
   const MachineOperand &SlideAmt = MI.getOperand(3);
   if (!SlideAmt.getReg().isVirtual())
     return std::nullopt;
-  MachineInstr *SlideAmtDef = MRI->getUniqueVRegDef(SlideAmt.getReg());
-  if (SlideAmtDef->getOpcode() != RISCV::ADDI ||
+  MachineInstr *SlideAmtDef = MRI->getVRegDef(SlideAmt.getReg());
+  if (!SlideAmtDef || SlideAmtDef->getOpcode() != RISCV::ADDI ||
       SlideAmtDef->getOperand(2).getImm() != -AVL.getImm() ||
       !SlideAmtDef->getOperand(1).getReg().isVirtual())
     return std::nullopt;
diff --git a/llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir b/llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir
index 71e6c6717c27b..bb64dd9b40845 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir
@@ -1,7 +1,7 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
 # RUN: llc -mtriple=riscv64 -mattr=+v -run-pass=riscv-vl-optimizer -o - %s | FileCheck %s
 
-# Make sure there's no crash with an undef VL operand with no defining
+# Make sure there's no crash with an undef operand that has no defining
 # instruction.
 
 ---
@@ -16,3 +16,15 @@ body: |
     %y:vr = PseudoVADD_VV_M1 $noreg, %x, $noreg, undef %vl:gprnox0, 5 /* e32 */, 0 /* tu, mu */
     $v8 = COPY %y
 ...
+---
+name: vslidedown_undef_slideamt
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: vslidedown_undef_slideamt
+    ; CHECK: %src:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1 /* vl=VLMAX */, 6 /* e64 */, 0 /* tu, mu */
+    ; CHECK-NEXT: %v:vr = PseudoVSLIDEDOWN_VX_M1 $noreg, %src, undef %amt:gpr, 1 /* vl */, 6 /* e64 */, 3 /* ta, ma */
+    ; CHECK-NEXT: PseudoVSE64_V_M1 %v, $noreg, 1 /* vl */, 6 /* e64 */
+    %src:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, -1, 6, 0
+    %v:vr = PseudoVSLIDEDOWN_VX_M1 $noreg, %src, undef %amt:gpr, 1, 6, 3
+    PseudoVSE64_V_M1 %v, $noreg, 1, 6
+...