[llvm] [X86][SSE] Improve ISD::FP_TO_*INT_SAT vector lowering (PR #199416)

[via llvm-commits]

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@@ -22549,7 +22563,157 @@ X86TargetLowering::LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const {
                               dl, VecI16VT, Src);
     return DAG.getNode(ISD::TRUNCATE, dl, DstVT, Res);
   }
+  if (!Subtarget.hasAVX10_2() &&
+      ((DstVT == MVT::v4i32 && Subtarget.hasSSE2()) ||
+       (DstVT == MVT::v8i32 && Subtarget.hasAVX()) ||
+       (DstVT == MVT::v16i32 && Subtarget.hasAVX512()))) {
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Panadulek wrote:

The condition should look like: if (DstVT == MVT::v4i32 || DstVT == MVT::v8i32 || DstVT == MVT::v16i32)?

https://github.com/llvm/llvm-project/pull/199416